blob: 32f59fd8f7148e0dcc7ba4f9917bf7017a0949b8 [file] [log] [blame]
Dinh Nguyen84b124d2019-04-23 16:55:03 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2019 Intel Corporation <www.intel.com>
4 */
5
6#ifndef __CACHE_H
7#define __CACHE_H
8
9/*
10 * Structure for the cache controller
11 */
12struct cache_info {
13 phys_addr_t base; /* Base physical address of cache device. */
14};
15
16struct cache_ops {
17 /**
18 * get_info() - Get basic cache info
19 *
20 * @dev: Device to check (UCLASS_CACHE)
21 * @info: Place to put info
22 * @return 0 if OK, -ve on error
23 */
24 int (*get_info)(struct udevice *dev, struct cache_info *info);
Rick Chen4d0140e2019-08-28 18:46:04 +080025
26 /**
27 * enable() - Enable cache
28 *
29 * @dev: Device to check (UCLASS_CACHE)
30 * @return 0 if OK, -ve on error
31 */
32 int (*enable)(struct udevice *dev);
33
34 /**
35 * disable() - Flush and disable cache
36 *
37 * @dev: Device to check (UCLASS_CACHE)
38 * @return 0 if OK, -ve on error
39 */
40 int (*disable)(struct udevice *dev);
Dinh Nguyen84b124d2019-04-23 16:55:03 -050041};
42
43#define cache_get_ops(dev) ((struct cache_ops *)(dev)->driver->ops)
44
45/**
46 * cache_get_info() - Get information about a cache controller
47 *
48 * @dev: Device to check (UCLASS_CACHE)
49 * @info: Returns cache info
50 * @return 0 if OK, -ve on error
51 */
52int cache_get_info(struct udevice *dev, struct cache_info *info);
53
Rick Chen4d0140e2019-08-28 18:46:04 +080054/**
55 * cache_enable() - Enable cache
56 *
57 * @dev: Device to check (UCLASS_CACHE)
58 * @return 0 if OK, -ve on error
59 */
60int cache_enable(struct udevice *dev);
61
62/**
63 * cache_disable() - Flush and disable cache
64 *
65 * @dev: Device to check (UCLASS_CACHE)
66 * @return 0 if OK, -ve on error
67 */
68int cache_disable(struct udevice *dev);
Dinh Nguyen84b124d2019-04-23 16:55:03 -050069#endif