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wdenkfe8c2802002-11-03 00:38:21 +00001/*
wdenk8655b6f2004-10-09 23:25:58 +00002 * MPC823 and PXA LCD Controller
wdenkfe8c2802002-11-03 00:38:21 +00003 *
4 * Modeled after video interface by Paolo Scaffardi
5 *
6 *
7 * (C) Copyright 2001
8 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
wdenk8655b6f2004-10-09 23:25:58 +000020 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenkfe8c2802002-11-03 00:38:21 +000021 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#ifndef _LCD_H_
30#define _LCD_H_
31
wdenk682011f2003-06-03 23:54:09 +000032extern char lcd_is_enabled;
33
wdenk8655b6f2004-10-09 23:25:58 +000034extern int lcd_line_length;
35extern int lcd_color_fg;
36extern int lcd_color_bg;
37
38/*
39 * Frame buffer memory information
40 */
41extern void *lcd_base; /* Start of framebuffer memory */
42extern void *lcd_console_address; /* Start of console buffer */
43
44extern short console_col;
45extern short console_row;
Alessandro Rubini61117222009-07-19 17:52:27 +020046extern struct vidinfo panel_info;
47
48extern void lcd_ctrl_init (void *lcdbase);
49extern void lcd_enable (void);
Nikita Kiryanov581bb412013-01-30 21:39:57 +000050extern int board_splash_screen_prepare(void);
Alessandro Rubini61117222009-07-19 17:52:27 +020051
52/* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
53extern void lcd_setcolreg (ushort regno,
54 ushort red, ushort green, ushort blue);
55extern void lcd_initcolregs (void);
56
57/* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
58extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
Anatolij Gustschinde3b49c2012-04-27 04:38:06 +000059extern int bmp_display(ulong addr, int x, int y);
wdenk8655b6f2004-10-09 23:25:58 +000060
Simon Glass9a8efc42012-10-30 13:40:18 +000061/**
62 * Set whether we need to flush the dcache when changing the LCD image. This
63 * defaults to off.
64 *
65 * @param flush non-zero to flush cache after update, 0 to skip
66 */
67void lcd_set_flush_dcache(int flush);
68
wdenk8655b6f2004-10-09 23:25:58 +000069#if defined CONFIG_MPC823
70/*
71 * LCD controller stucture for MPC823 CPU
72 */
73typedef struct vidinfo {
74 ushort vl_col; /* Number of columns (i.e. 640) */
75 ushort vl_row; /* Number of rows (i.e. 480) */
76 ushort vl_width; /* Width of display area in millimeters */
77 ushort vl_height; /* Height of display area in millimeters */
78
79 /* LCD configuration register */
80 u_char vl_clkp; /* Clock polarity */
81 u_char vl_oep; /* Output Enable polarity */
82 u_char vl_hsp; /* Horizontal Sync polarity */
83 u_char vl_vsp; /* Vertical Sync polarity */
84 u_char vl_dp; /* Data polarity */
85 u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
86 u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
87 u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */
88 u_char vl_clor; /* Color, 0 = mono, 1 = color */
89 u_char vl_tft; /* 0 = passive, 1 = TFT */
90
91 /* Horizontal control register. Timing from data sheet */
92 ushort vl_wbl; /* Wait between lines */
93
94 /* Vertical control register */
95 u_char vl_vpw; /* Vertical sync pulse width */
96 u_char vl_lcdac; /* LCD AC timing */
97 u_char vl_wbf; /* Wait between frames */
98} vidinfo_t;
99
Marek Vasutabc20ab2011-11-26 07:20:07 +0100100#elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
101 defined CONFIG_CPU_MONAHANS
wdenk8655b6f2004-10-09 23:25:58 +0000102/*
103 * PXA LCD DMA descriptor
104 */
105struct pxafb_dma_descriptor {
106 u_long fdadr; /* Frame descriptor address register */
107 u_long fsadr; /* Frame source address register */
108 u_long fidr; /* Frame ID register */
109 u_long ldcmd; /* Command register */
110};
111
112/*
113 * PXA LCD info
114 */
115struct pxafb_info {
116
117 /* Misc registers */
118 u_long reg_lccr3;
119 u_long reg_lccr2;
120 u_long reg_lccr1;
121 u_long reg_lccr0;
122 u_long fdadr0;
123 u_long fdadr1;
124
125 /* DMA descriptors */
126 struct pxafb_dma_descriptor * dmadesc_fblow;
127 struct pxafb_dma_descriptor * dmadesc_fbhigh;
128 struct pxafb_dma_descriptor * dmadesc_palette;
129
130 u_long screen; /* physical address of frame buffer */
131 u_long palette; /* physical address of palette memory */
132 u_int palette_size;
133};
134
135/*
136 * LCD controller stucture for PXA CPU
137 */
138typedef struct vidinfo {
139 ushort vl_col; /* Number of columns (i.e. 640) */
140 ushort vl_row; /* Number of rows (i.e. 480) */
141 ushort vl_width; /* Width of display area in millimeters */
142 ushort vl_height; /* Height of display area in millimeters */
143
144 /* LCD configuration register */
145 u_char vl_clkp; /* Clock polarity */
146 u_char vl_oep; /* Output Enable polarity */
147 u_char vl_hsp; /* Horizontal Sync polarity */
148 u_char vl_vsp; /* Vertical Sync polarity */
149 u_char vl_dp; /* Data polarity */
150 u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
151 u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
152 u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */
153 u_char vl_clor; /* Color, 0 = mono, 1 = color */
154 u_char vl_tft; /* 0 = passive, 1 = TFT */
155
156 /* Horizontal control register. Timing from data sheet */
157 ushort vl_hpw; /* Horz sync pulse width */
158 u_char vl_blw; /* Wait before of line */
159 u_char vl_elw; /* Wait end of line */
160
161 /* Vertical control register. */
162 u_char vl_vpw; /* Vertical sync pulse width */
163 u_char vl_bfw; /* Wait before of frame */
164 u_char vl_efw; /* Wait end of frame */
165
166 /* PXA LCD controller params */
167 struct pxafb_info pxa;
168} vidinfo_t;
169
Bo Shenf6b690e2012-05-25 00:59:58 +0000170#elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
Stelian Pop39cf4802008-05-09 21:57:18 +0200171
172typedef struct vidinfo {
Marek Vasut78459122011-10-24 23:41:00 +0000173 ushort vl_col; /* Number of columns (i.e. 640) */
174 ushort vl_row; /* Number of rows (i.e. 480) */
Stelian Pop39cf4802008-05-09 21:57:18 +0200175 u_long vl_clk; /* pixel clock in ps */
176
177 /* LCD configuration register */
178 u_long vl_sync; /* Horizontal / vertical sync */
179 u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
180 u_long vl_tft; /* 0 = passive, 1 = TFT */
Alexander Steincdfcedb2010-07-20 08:55:40 +0200181 u_long vl_cont_pol_low; /* contrast polarity is low */
Bo Shenf6b690e2012-05-25 00:59:58 +0000182 u_long vl_clk_pol; /* clock polarity */
Stelian Pop39cf4802008-05-09 21:57:18 +0200183
184 /* Horizontal control register. */
185 u_long vl_hsync_len; /* Length of horizontal sync */
186 u_long vl_left_margin; /* Time from sync to picture */
187 u_long vl_right_margin; /* Time from picture to sync */
188
189 /* Vertical control register. */
190 u_long vl_vsync_len; /* Length of vertical sync */
191 u_long vl_upper_margin; /* Time from sync to picture */
192 u_long vl_lower_margin; /* Time from picture to sync */
193
194 u_long mmio; /* Memory mapped registers */
195} vidinfo_t;
196
Donghwa Lee559a05c2012-04-05 19:36:15 +0000197#elif defined(CONFIG_EXYNOS_FB)
198
199enum {
200 FIMD_RGB_INTERFACE = 1,
201 FIMD_CPU_INTERFACE = 2,
202};
203
Donghwa Lee90464972012-05-09 19:23:46 +0000204enum exynos_fb_rgb_mode_t {
205 MODE_RGB_P = 0,
206 MODE_BGR_P = 1,
207 MODE_RGB_S = 2,
208 MODE_BGR_S = 3,
209};
210
Donghwa Lee559a05c2012-04-05 19:36:15 +0000211typedef struct vidinfo {
212 ushort vl_col; /* Number of columns (i.e. 640) */
213 ushort vl_row; /* Number of rows (i.e. 480) */
214 ushort vl_width; /* Width of display area in millimeters */
215 ushort vl_height; /* Height of display area in millimeters */
216
217 /* LCD configuration register */
218 u_char vl_freq; /* Frequency */
219 u_char vl_clkp; /* Clock polarity */
220 u_char vl_oep; /* Output Enable polarity */
221 u_char vl_hsp; /* Horizontal Sync polarity */
222 u_char vl_vsp; /* Vertical Sync polarity */
223 u_char vl_dp; /* Data polarity */
224 u_char vl_bpix; /* Bits per pixel */
225
226 /* Horizontal control register. Timing from data sheet */
227 u_char vl_hspw; /* Horz sync pulse width */
228 u_char vl_hfpd; /* Wait before of line */
229 u_char vl_hbpd; /* Wait end of line */
230
231 /* Vertical control register. */
232 u_char vl_vspw; /* Vertical sync pulse width */
233 u_char vl_vfpd; /* Wait before of frame */
234 u_char vl_vbpd; /* Wait end of frame */
235 u_char vl_cmd_allow_len; /* Wait end of frame */
236
237 void (*cfg_gpio)(void);
238 void (*backlight_on)(unsigned int onoff);
239 void (*reset_lcd)(void);
240 void (*lcd_power_on)(void);
241 void (*cfg_ldo)(void);
242 void (*enable_ldo)(unsigned int onoff);
243 void (*mipi_power)(void);
244 void (*backlight_reset)(void);
245
246 unsigned int win_id;
247 unsigned int init_delay;
248 unsigned int power_on_delay;
249 unsigned int reset_delay;
250 unsigned int interface_mode;
251 unsigned int mipi_enabled;
Donghwa Lee5addfcf2012-07-02 01:16:05 +0000252 unsigned int dp_enabled;
Donghwa Lee559a05c2012-04-05 19:36:15 +0000253 unsigned int cs_setup;
254 unsigned int wr_setup;
255 unsigned int wr_act;
256 unsigned int wr_hold;
Donghwa Lee90464972012-05-09 19:23:46 +0000257 unsigned int logo_on;
258 unsigned int logo_width;
259 unsigned int logo_height;
260 unsigned long logo_addr;
261 unsigned int rgb_mode;
262 unsigned int resolution;
Donghwa Lee559a05c2012-04-05 19:36:15 +0000263
264 /* parent clock name(MPLL, EPLL or VPLL) */
265 unsigned int pclk_name;
266 /* ratio value for source clock from parent clock. */
267 unsigned int sclk_div;
268
269 unsigned int dual_lcd_enabled;
270
271} vidinfo_t;
272
273void init_panel_info(vidinfo_t *vid);
274
Guennadi Liakhovetskib245e652009-02-06 10:37:53 +0100275#else
276
277typedef struct vidinfo {
278 ushort vl_col; /* Number of columns (i.e. 160) */
279 ushort vl_row; /* Number of rows (i.e. 100) */
280
281 u_char vl_bpix; /* Bits per pixel, 0 = 1 */
282
283 ushort *cmap; /* Pointer to the colormap */
284
285 void *priv; /* Pointer to driver-specific data */
286} vidinfo_t;
287
Marek Vasutabc20ab2011-11-26 07:20:07 +0100288#endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
wdenk8655b6f2004-10-09 23:25:58 +0000289
Alessandro Rubini60e97412009-07-21 14:09:45 +0200290extern vidinfo_t panel_info;
291
wdenkfe8c2802002-11-03 00:38:21 +0000292/* Video functions */
293
wdenk8655b6f2004-10-09 23:25:58 +0000294#if defined(CONFIG_RBC823)
295void lcd_disable (void);
296#endif
297
298
wdenkc3f4d172004-06-25 23:35:58 +0000299/* int lcd_init (void *lcdbase); */
wdenkfe8c2802002-11-03 00:38:21 +0000300void lcd_putc (const char c);
301void lcd_puts (const char *s);
302void lcd_printf (const char *fmt, ...);
Che-Liang Chiou02110902011-10-20 23:07:03 +0000303void lcd_clear(void);
304int lcd_display_bitmap(ulong bmp_image, int x, int y);
wdenkfe8c2802002-11-03 00:38:21 +0000305
Vadim Bendebury395166c2012-09-28 15:11:13 +0000306/**
307 * Get the width of the LCD in pixels
308 *
309 * @return width of LCD in pixels
310 */
311int lcd_get_pixel_width(void);
312
313/**
314 * Get the height of the LCD in pixels
315 *
316 * @return height of LCD in pixels
317 */
318int lcd_get_pixel_height(void);
319
320/**
321 * Get the number of text lines/rows on the LCD
322 *
323 * @return number of rows
324 */
325int lcd_get_screen_rows(void);
326
327/**
328 * Get the number of text columns on the LCD
329 *
330 * @return number of columns
331 */
332int lcd_get_screen_columns(void);
333
334/**
335 * Set the position of the text cursor
336 *
337 * @param col Column to place cursor (0 = left side)
338 * @param row Row to place cursor (0 = top line)
339 */
340void lcd_position_cursor(unsigned col, unsigned row);
341
Haavard Skinnemoen6b59e032008-09-01 16:21:22 +0200342/* Allow boards to customize the information displayed */
343void lcd_show_board_info(void);
wdenk8655b6f2004-10-09 23:25:58 +0000344
Simon Glass676d3192012-10-17 13:24:54 +0000345/* Return the size of the LCD frame buffer, and the line length */
346int lcd_get_size(int *line_length);
347
wdenk8655b6f2004-10-09 23:25:58 +0000348/************************************************************************/
349/* ** BITMAP DISPLAY SUPPORT */
350/************************************************************************/
Jon Loeliger639221c2007-07-09 17:15:49 -0500351#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
wdenk8655b6f2004-10-09 23:25:58 +0000352# include <bmp_layout.h>
353# include <asm/byteorder.h>
Jon Loeliger639221c2007-07-09 17:15:49 -0500354#endif
wdenk8655b6f2004-10-09 23:25:58 +0000355
wdenk8655b6f2004-10-09 23:25:58 +0000356/*
357 * Information about displays we are using. This is for configuring
358 * the LCD controller and memory allocation. Someone has to know what
359 * is connected, as we can't autodetect anything.
360 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200361#define CONFIG_SYS_HIGH 0 /* Pins are active high */
362#define CONFIG_SYS_LOW 1 /* Pins are active low */
wdenk8655b6f2004-10-09 23:25:58 +0000363
364#define LCD_MONOCHROME 0
365#define LCD_COLOR2 1
366#define LCD_COLOR4 2
367#define LCD_COLOR8 3
368#define LCD_COLOR16 4
369
370/*----------------------------------------------------------------------*/
wdenk88804d12005-07-04 00:03:16 +0000371#if defined(CONFIG_LCD_INFO_BELOW_LOGO)
wdenk8655b6f2004-10-09 23:25:58 +0000372# define LCD_INFO_X 0
373# define LCD_INFO_Y (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
374#elif defined(CONFIG_LCD_LOGO)
375# define LCD_INFO_X (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
376# define LCD_INFO_Y (VIDEO_FONT_HEIGHT)
377#else
378# define LCD_INFO_X (VIDEO_FONT_WIDTH)
379# define LCD_INFO_Y (VIDEO_FONT_HEIGHT)
380#endif
381
382/* Default to 8bpp if bit depth not specified */
383#ifndef LCD_BPP
384# define LCD_BPP LCD_COLOR8
385#endif
386#ifndef LCD_DF
387# define LCD_DF 1
388#endif
389
390/* Calculate nr. of bits per pixel and nr. of colors */
391#define NBITS(bit_code) (1 << (bit_code))
392#define NCOLORS(bit_code) (1 << NBITS(bit_code))
393
394/************************************************************************/
395/* ** CONSOLE CONSTANTS */
396/************************************************************************/
397#if LCD_BPP == LCD_MONOCHROME
398
399/*
400 * Simple black/white definitions
401 */
402# define CONSOLE_COLOR_BLACK 0
403# define CONSOLE_COLOR_WHITE 1 /* Must remain last / highest */
404
405#elif LCD_BPP == LCD_COLOR8
406
407/*
408 * 8bpp color definitions
409 */
410# define CONSOLE_COLOR_BLACK 0
411# define CONSOLE_COLOR_RED 1
412# define CONSOLE_COLOR_GREEN 2
413# define CONSOLE_COLOR_YELLOW 3
414# define CONSOLE_COLOR_BLUE 4
415# define CONSOLE_COLOR_MAGENTA 5
416# define CONSOLE_COLOR_CYAN 6
417# define CONSOLE_COLOR_GREY 14
418# define CONSOLE_COLOR_WHITE 15 /* Must remain last / highest */
419
420#else
421
422/*
423 * 16bpp color definitions
424 */
425# define CONSOLE_COLOR_BLACK 0x0000
426# define CONSOLE_COLOR_WHITE 0xffff /* Must remain last / highest */
427
428#endif /* color definitions */
429
wdenk8655b6f2004-10-09 23:25:58 +0000430/************************************************************************/
431#ifndef PAGE_SIZE
432# define PAGE_SIZE 4096
433#endif
434
435/************************************************************************/
436/* ** CONSOLE DEFINITIONS & FUNCTIONS */
437/************************************************************************/
wdenk88804d12005-07-04 00:03:16 +0000438#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
wdenk8655b6f2004-10-09 23:25:58 +0000439# define CONSOLE_ROWS ((panel_info.vl_row-BMP_LOGO_HEIGHT) \
440 / VIDEO_FONT_HEIGHT)
441#else
442# define CONSOLE_ROWS (panel_info.vl_row / VIDEO_FONT_HEIGHT)
443#endif
444
445#define CONSOLE_COLS (panel_info.vl_col / VIDEO_FONT_WIDTH)
446#define CONSOLE_ROW_SIZE (VIDEO_FONT_HEIGHT * lcd_line_length)
447#define CONSOLE_ROW_FIRST (lcd_console_address)
448#define CONSOLE_ROW_SECOND (lcd_console_address + CONSOLE_ROW_SIZE)
449#define CONSOLE_ROW_LAST (lcd_console_address + CONSOLE_SIZE \
450 - CONSOLE_ROW_SIZE)
451#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * CONSOLE_ROWS)
452#define CONSOLE_SCROLL_SIZE (CONSOLE_SIZE - CONSOLE_ROW_SIZE)
453
454#if LCD_BPP == LCD_MONOCHROME
455# define COLOR_MASK(c) ((c) | (c) << 1 | (c) << 2 | (c) << 3 | \
456 (c) << 4 | (c) << 5 | (c) << 6 | (c) << 7)
Mark Jackson69f32e62009-07-21 11:18:44 +0100457#elif (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16)
wdenk8655b6f2004-10-09 23:25:58 +0000458# define COLOR_MASK(c) (c)
459#else
460# error Unsupported LCD BPP.
461#endif
462
463/************************************************************************/
464
465#endif /* _LCD_H_ */