blob: 38b1e9377c328b50b1d21dec5b93e4fffdb5c1c1 [file] [log] [blame]
Marek Vasut5434caf2013-06-16 15:39:02 +02001/*
2 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19#ifndef __CONFIGS_MXS_H__
20#define __CONFIGS_MXS_H__
21
22/*
23 * Includes
24 */
25
26#if defined(CONFIG_MX23) && defined(CONFIG_MX28)
27#error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
28#elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
29#error Select one of CONFIG_MX23 or CONFIG_MX28 !
30#endif
31
32#include <asm/arch/regs-base.h>
33
34#if defined(CONFIG_MX23)
35#include <asm/arch/iomux-mx23.h>
36#elif defined(CONFIG_MX28)
37#include <asm/arch/iomux-mx28.h>
38#endif
39
40/*
41 * CPU specifics
42 */
Marek Vasut0782bdf2014-04-04 00:41:03 +020043#define CONFIG_SYS_GENERIC_BOARD
Marek Vasut5434caf2013-06-16 15:39:02 +020044
Marek Vasut5434caf2013-06-16 15:39:02 +020045/* MXS uses FDT */
46#define CONFIG_OF_LIBFDT
47
48/* Startup hooks */
49#define CONFIG_BOARD_EARLY_INIT_F
50#define CONFIG_ARCH_MISC_INIT
51
52/* SPL */
Marek Vasut5434caf2013-06-16 15:39:02 +020053#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
54#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
55#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
56#define CONFIG_SPL_LIBCOMMON_SUPPORT
57#define CONFIG_SPL_LIBGENERIC_SUPPORT
58#define CONFIG_SPL_GPIO_SUPPORT
59
60/* Memory sizes */
61#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
Marek Vasut5434caf2013-06-16 15:39:02 +020062#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
63#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
64
65/* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
66#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
67#if defined(CONFIG_MX23)
68#define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024)
69#elif defined(CONFIG_MX28)
70#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
71#endif
72
73/* Point initial SP in SRAM so SPL can use it too. */
74#define CONFIG_SYS_INIT_SP_OFFSET \
75 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
76#define CONFIG_SYS_INIT_SP_ADDR \
77 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
78
79/*
80 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
81 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
82 * binary. In case there was more of this mess, 0x100 bytes are skipped.
Marek Vasut9c2c8a32014-03-05 20:01:13 +010083 *
84 * In case of a HAB boot, we cannot for some weird reason use the first 4KiB
85 * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
86 * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
87 *
88 * As for the SPL, we must avoid the first 4 KiB as well, but we load the
89 * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
Marek Vasut5434caf2013-06-16 15:39:02 +020090 */
Marek Vasut9c2c8a32014-03-05 20:01:13 +010091#define CONFIG_SYS_TEXT_BASE 0x40002000
92#define CONFIG_SPL_TEXT_BASE 0x00001000
Marek Vasut5434caf2013-06-16 15:39:02 +020093
94/* U-Boot general configuration */
95#define CONFIG_SYS_LONGHELP
Marek Vasut5434caf2013-06-16 15:39:02 +020096#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
Marek Vasut5434caf2013-06-16 15:39:02 +020097#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
98#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
99 /* Boot argument buffer size */
100#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
101#define CONFIG_AUTO_COMPLETE /* Command auto complete */
102#define CONFIG_CMDLINE_EDITING /* Command history etc */
103#define CONFIG_SYS_HUSH_PARSER
104#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
105
106/* Booting Linux */
107#define CONFIG_CMDLINE_TAG
108#define CONFIG_SETUP_MEMORY_TAGS
109
110/*
111 * Drivers
112 */
113
114/* APBH DMA */
115#define CONFIG_APBH_DMA
116
117/* GPIO */
118#define CONFIG_MXS_GPIO
119
Andreas Wass0cfb8af2013-08-16 18:24:37 +0200120/*
121 * DUART Serial Driver.
122 * Conflicts with AUART driver which can be set by board.
123 */
124#ifndef CONFIG_MXS_AUART
Marek Vasut5434caf2013-06-16 15:39:02 +0200125#define CONFIG_PL011_SERIAL
126#define CONFIG_PL011_CLOCK 24000000
127#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
128#define CONFIG_CONS_INDEX 0
Andreas Wass0cfb8af2013-08-16 18:24:37 +0200129#endif
Marek Vasut5434caf2013-06-16 15:39:02 +0200130/* Default baudrate can be overriden by board! */
131#ifndef CONFIG_BAUDRATE
132#define CONFIG_BAUDRATE 115200
133#endif
134
135/* FEC Ethernet on SoC */
136#ifdef CONFIG_FEC_MXC
137#define CONFIG_MII
138#ifndef CONFIG_ETHPRIME
139#define CONFIG_ETHPRIME "FEC0"
140#endif
141#ifndef CONFIG_FEC_XCV_TYPE
142#define CONFIG_FEC_XCV_TYPE RMII
143#endif
144#endif
145
146/* I2C */
147#ifdef CONFIG_CMD_I2C
Marek Vasut1fa96e82014-10-20 00:23:41 +0200148#define CONFIG_SYS_I2C
149#define CONFIG_SYS_I2C_MXS
Marek Vasut5434caf2013-06-16 15:39:02 +0200150#define CONFIG_HARD_I2C
151#ifndef CONFIG_SYS_I2C_SPEED
152#define CONFIG_SYS_I2C_SPEED 400000
153#endif
154#endif
155
156/* LCD */
157#ifdef CONFIG_VIDEO
158#define CONFIG_CFB_CONSOLE
159#define CONFIG_VIDEO_MXS
160#define CONFIG_VIDEO_SW_CURSOR
161#define CONFIG_VGA_AS_SINGLE_DEVICE
162#define CONFIG_SYS_CONSOLE_IS_IN_ENV
163#endif
164
165/* MMC */
166#ifdef CONFIG_CMD_MMC
167#define CONFIG_MMC
168#define CONFIG_GENERIC_MMC
169#define CONFIG_BOUNCE_BUFFER
170#define CONFIG_MXS_MMC
171#endif
172
173/* NAND */
174#ifdef CONFIG_CMD_NAND
175#define CONFIG_NAND_MXS
176#define CONFIG_SYS_MAX_NAND_DEVICE 1
177#define CONFIG_SYS_NAND_BASE 0x60000000
178#define CONFIG_SYS_NAND_5_ADDR_CYCLE
179#endif
180
Marek Vasut2bbcccf2014-03-06 01:52:03 +0100181/* OCOTP */
182#ifdef CONFIG_CMD_FUSE
183#define CONFIG_MXS_OCOTP
184#endif
185
Marek Vasut5434caf2013-06-16 15:39:02 +0200186/* SPI */
187#ifdef CONFIG_CMD_SPI
188#define CONFIG_HARD_SPI
189#define CONFIG_MXS_SPI
190#define CONFIG_SPI_HALF_DUPLEX
191#endif
192
193/* USB */
194#ifdef CONFIG_CMD_USB
195#define CONFIG_USB_EHCI
196#define CONFIG_USB_EHCI_MXS
197#define CONFIG_EHCI_IS_TDI
198#endif
199
200#endif /* __CONFIGS_MXS_H__ */