blob: 2a08be9b6d181c64e147bfd32f919e0a63289e98 [file] [log] [blame]
Weijie Gao6136a232022-09-09 20:00:16 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2022 MediaTek Inc. All rights reserved.
4 *
5 * Author: Weijie Gao <weijie.gao@mediatek.com>
6 */
7
8#include <linux/types.h>
9#include <cpu.h>
10#include <dm.h>
11#include <regmap.h>
12#include <syscon.h>
13#include <asm/global_data.h>
14#include <linux/err.h>
15#include <linux/io.h>
16
17DECLARE_GLOBAL_DATA_PTR;
18
19struct mtk_cpu_plat {
20 struct regmap *hwver;
21};
22
23static int mtk_cpu_get_desc(const struct udevice *dev, char *buf, int size)
24{
25 struct mtk_cpu_plat *plat = dev_get_plat(dev);
26 uint val;
27
28 regmap_read(plat->hwver, 0, &val);
29
30 snprintf(buf, size, "MediaTek MT%04X", val);
31
32 return 0;
33}
34
35static int mtk_cpu_get_count(const struct udevice *dev)
36{
37 return 1;
38}
39
40static int mtk_cpu_get_vendor(const struct udevice *dev, char *buf, int size)
41{
42 snprintf(buf, size, "MediaTek");
43
44 return 0;
45}
46
47static int mtk_cpu_probe(struct udevice *dev)
48{
49 struct mtk_cpu_plat *plat = dev_get_plat(dev);
50 struct ofnode_phandle_args args;
51 int ret;
52
53 ret = dev_read_phandle_with_args(dev, "mediatek,hwver", NULL, 0, 0,
54 &args);
55 if (ret)
56 return ret;
57
58 plat->hwver = syscon_node_to_regmap(args.node);
59 if (IS_ERR(plat->hwver))
60 return PTR_ERR(plat->hwver);
61
62 return 0;
63}
64
65static const struct cpu_ops mtk_cpu_ops = {
66 .get_desc = mtk_cpu_get_desc,
67 .get_count = mtk_cpu_get_count,
68 .get_vendor = mtk_cpu_get_vendor,
69};
70
71static const struct udevice_id mtk_cpu_ids[] = {
72 { .compatible = "arm,cortex-a7" },
73 { .compatible = "arm,cortex-a53" },
74 { .compatible = "arm,cortex-a73" },
75 { /* sentinel */ }
76};
77
78U_BOOT_DRIVER(cpu_mtk) = {
79 .name = "mtk-cpu",
80 .id = UCLASS_CPU,
81 .of_match = mtk_cpu_ids,
82 .ops = &mtk_cpu_ops,
83 .probe = mtk_cpu_probe,
84 .plat_auto = sizeof(struct mtk_cpu_plat),
85 .flags = DM_FLAG_PRE_RELOC,
86};