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wdenk5e5f9ed2005-04-13 23:15:10 +00001/*
2 * (C) Copyright 2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk5e5f9ed2005-04-13 23:15:10 +00006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
Masahiro Yamadab2a6dfe2014-01-16 11:03:07 +090016#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020017#define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */
Anatolij Gustschinab9f5f82015-08-13 23:57:53 +020018#define CONFIG_SYS_GENERIC_BOARD
19#define CONFIG_DISPLAY_BOARDINFO
wdenk5e5f9ed2005-04-13 23:15:10 +000020
Wolfgang Denk2ae18242010-10-06 09:05:45 +020021/*
22 * allowed and functional CONFIG_SYS_TEXT_BASE values:
23 * 0xfe000000 low boot at 0x00000100 (default board setting)
24 * 0x00100000 RAM load and test
25 */
26#define CONFIG_SYS_TEXT_BASE 0xFE000000
27
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020028#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
wdenk5e5f9ed2005-04-13 23:15:10 +000029
wdenk5e5f9ed2005-04-13 23:15:10 +000030#define CONFIG_BOARD_EARLY_INIT_R
31
Becky Bruce31d82672008-05-08 19:02:12 -050032#define CONFIG_HIGH_BATS 1 /* High BATs supported */
33
wdenk5e5f9ed2005-04-13 23:15:10 +000034/*
35 * Serial console configuration
36 */
37#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
38#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
wdenk5e5f9ed2005-04-13 23:15:10 +000040
wdenk5e5f9ed2005-04-13 23:15:10 +000041
Jon Loeliger37e4f242007-07-04 22:31:56 -050042/*
Jon Loeliger80ff4f92007-07-10 09:29:01 -050043 * BOOTP options
44 */
45#define CONFIG_BOOTP_BOOTFILESIZE
46#define CONFIG_BOOTP_BOOTPATH
47#define CONFIG_BOOTP_GATEWAY
48#define CONFIG_BOOTP_HOSTNAME
49
50
51/*
Jon Loeliger37e4f242007-07-04 22:31:56 -050052 * Command line configuration.
53 */
Jon Loeliger37e4f242007-07-04 22:31:56 -050054#define CONFIG_CMD_ASKENV
55#define CONFIG_CMD_DATE
56#define CONFIG_CMD_DHCP
57#define CONFIG_CMD_IMMAP
58#define CONFIG_CMD_MII
Jon Loeliger37e4f242007-07-04 22:31:56 -050059#define CONFIG_CMD_REGINFO
60#define CONFIG_CMD_SNTP
61
wdenk5e5f9ed2005-04-13 23:15:10 +000062
63/*
64 * MUST be low boot - HIGHBOOT is not supported anymore
65 */
Wolfgang Denk14d0a022010-10-07 21:51:12 +020066#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067# define CONFIG_SYS_LOWBOOT 1
68# define CONFIG_SYS_LOWBOOT16 1
wdenk5e5f9ed2005-04-13 23:15:10 +000069#else
Wolfgang Denk14d0a022010-10-07 21:51:12 +020070# error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
wdenk5e5f9ed2005-04-13 23:15:10 +000071#endif
72
73/*
74 * Autobooting
75 */
76#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
77
78#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk32bf3d12008-03-03 12:16:44 +010079 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk5e5f9ed2005-04-13 23:15:10 +000080 "echo"
81
82#undef CONFIG_BOOTARGS
83
84#define CONFIG_EXTRA_ENV_SETTINGS \
85 "netdev=eth0\0" \
86 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010087 "nfsroot=${serverip}:${rootpath}\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +000088 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010089 "addip=setenv bootargs ${bootargs} " \
90 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
91 ":${hostname}:${netdev}:off panic=1\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +000092 "flash_nfs=run nfsargs addip;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010093 "bootm ${kernel_addr}\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +000094 "flash_self=run ramargs addip;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010095 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
96 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +000097 "rootpath=/opt/eldk/ppc_6xx\0" \
98 "bootfile=/tftpboot/canmb/uImage\0" \
99 ""
100
101#define CONFIG_BOOTCOMMAND "run flash_self"
102
103/*
104 * IPB Bus clocking configuration.
105 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
wdenk5e5f9ed2005-04-13 23:15:10 +0000107
108/*
109 * Flash configuration, expect one 16 Megabyte Bank at most
110 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#define CONFIG_SYS_FLASH_BASE 0xFE000000
112#define CONFIG_SYS_FLASH_SIZE 0x02000000
113#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
114#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
wdenk5e5f9ed2005-04-13 23:15:10 +0000115
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200116#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
117#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
wdenk5e5f9ed2005-04-13 23:15:10 +0000118
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200119#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200120#define CONFIG_SYS_FLASH_CFI
121#define CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5e5f9ed2005-04-13 23:15:10 +0000122
123/*
wdenk5e5f9ed2005-04-13 23:15:10 +0000124 * Environment settings
125 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200126#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200127#define CONFIG_ENV_OFFSET (2*128*1024)
128#define CONFIG_ENV_SIZE 0x2000
129#define CONFIG_ENV_SECT_SIZE (128*1024)
wdenk5e5f9ed2005-04-13 23:15:10 +0000130
131/*
132 * Memory map
133 *
134 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
135 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200136#define CONFIG_SYS_MBAR 0xf0000000 /* DO NOT CHANGE this */
137#define CONFIG_SYS_SDRAM_BASE 0x00000000
138#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
wdenk5e5f9ed2005-04-13 23:15:10 +0000139
140/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk553f0982010-10-26 13:32:32 +0200142#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
wdenk5e5f9ed2005-04-13 23:15:10 +0000143
144
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200145#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenk5e5f9ed2005-04-13 23:15:10 +0000147
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200148#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
150# define CONFIG_SYS_RAMBOOT 1
wdenk5e5f9ed2005-04-13 23:15:10 +0000151#endif
152
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200153#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
154#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
155#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenk5e5f9ed2005-04-13 23:15:10 +0000156
157/*
158 * Ethernet configuration
159 */
160#define CONFIG_MPC5xxx_FEC 1
Ben Warren86321fc2009-02-05 23:58:25 -0800161#define CONFIG_MPC5xxx_FEC_MII100
wdenka6310922005-04-21 21:10:22 +0000162#define CONFIG_PHY_ADDR 0x0
wdenk5e5f9ed2005-04-13 23:15:10 +0000163/*
164 * GPIO configuration:
165 * PSC1,2,3 predefined as UART
166 * PCI disabled
167 * Ethernet 100 with MD
168 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169#define CONFIG_SYS_GPS_PORT_CONFIG 0x00058444
wdenk5e5f9ed2005-04-13 23:15:10 +0000170
171/*
172 * Miscellaneous configurable options
173 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200174#define CONFIG_SYS_LONGHELP /* undef to save memory */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500175#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenk5e5f9ed2005-04-13 23:15:10 +0000177#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200178# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenk5e5f9ed2005-04-13 23:15:10 +0000179#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200180#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
181#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
182#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk5e5f9ed2005-04-13 23:15:10 +0000183
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
185#define CONFIG_SYS_MEMTEST_END 0x01f00000 /* 1 ... 31 MB in DRAM */
wdenk5e5f9ed2005-04-13 23:15:10 +0000186
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
wdenk5e5f9ed2005-04-13 23:15:10 +0000188
wdenk5e5f9ed2005-04-13 23:15:10 +0000189#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
190
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200191#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500192#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200193# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500194#endif
195
wdenk5e5f9ed2005-04-13 23:15:10 +0000196/*
197 * Various low-level settings
198 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
200#define CONFIG_SYS_HID0_FINAL HID0_ICE
wdenk5e5f9ed2005-04-13 23:15:10 +0000201
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200202#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
203#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
204#define CONFIG_SYS_BOOTCS_CFG 0x00047D01
205#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
206#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
wdenk5e5f9ed2005-04-13 23:15:10 +0000207
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208#define CONFIG_SYS_CS_BURST 0x00000000
209#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
wdenk5e5f9ed2005-04-13 23:15:10 +0000210
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200211#define CONFIG_SYS_RESET_ADDRESS 0x7f000000
wdenk5e5f9ed2005-04-13 23:15:10 +0000212
213#endif /* __CONFIG_H */