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Rob Herring37fc0ed2011-10-24 08:50:20 +00001/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Rob Herring37fc0ed2011-10-24 08:50:20 +00005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Rob Herringac9ae132014-04-10 16:17:30 -050010#include <config_distro_defaults.h>
11
Rob Herring185a5bb2013-06-12 22:24:47 -050012#define CONFIG_SYS_DCACHE_OFF
Rob Herring185a5bb2013-06-12 22:24:47 -050013#define CONFIG_SYS_THUMB_BUILD
Rob Herring37fc0ed2011-10-24 08:50:20 +000014
15#define CONFIG_SYS_NO_FLASH
Rob Herring46e09e62014-04-11 15:09:44 -050016#define CONFIG_SYS_GENERIC_BOARD
Rob Herring37fc0ed2011-10-24 08:50:20 +000017
Rob Herring76c39992013-06-12 22:24:52 -050018#define CONFIG_OF_BOARD_SETUP
Rob Herring37fc0ed2011-10-24 08:50:20 +000019#define CONFIG_FIT
20#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
21
Rob Herring9df1bd42013-10-04 10:22:43 -050022#define CONFIG_SYS_TIMER_RATE (150000000/256)
23#define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4)
24#define CONFIG_SYS_TIMER_COUNTS_DOWN
25
Rob Herring37fc0ed2011-10-24 08:50:20 +000026/*
27 * Size of malloc() pool
28 */
29#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
30
31#define CONFIG_PL011_SERIAL
32#define CONFIG_PL011_CLOCK 150000000
33#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) }
34#define CONFIG_CONS_INDEX 0
35
Rob Herring185a5bb2013-06-12 22:24:47 -050036#define CONFIG_BAUDRATE 115200
Rob Herring37fc0ed2011-10-24 08:50:20 +000037
Rob Herring877012d2012-02-01 16:57:54 +000038#define CONFIG_BOOTCOUNT_LIMIT
Stefan Roese0044c422012-08-16 17:55:41 +000039#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
40#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
Rob Herring877012d2012-02-01 16:57:54 +000041#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c
42
Rob Herring37fc0ed2011-10-24 08:50:20 +000043#define CONFIG_MISC_INIT_R
Rob Herring344ca0b2013-08-24 10:10:54 -050044#define CONFIG_LIBATA
Rob Herring37fc0ed2011-10-24 08:50:20 +000045#define CONFIG_SCSI_AHCI
46#define CONFIG_SCSI_AHCI_PLAT
47#define CONFIG_SYS_SCSI_MAX_SCSI_ID 5
48#define CONFIG_SYS_SCSI_MAX_LUN 1
49#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
50 CONFIG_SYS_SCSI_MAX_LUN)
51
Rob Herring9a420982011-12-15 11:15:50 +000052#define CONFIG_CALXEDA_XGMAC
53
Rob Herring37fc0ed2011-10-24 08:50:20 +000054/*
55 * Command line configuration.
56 */
Rob Herring37fc0ed2011-10-24 08:50:20 +000057#define CONFIG_CMD_SCSI
Rob Herring37fc0ed2011-10-24 08:50:20 +000058
Rob Herringe1df2832013-06-12 22:24:51 -050059#define CONFIG_BOOT_RETRY_TIME -1
60#define CONFIG_RESET_TO_RETRY
Stefan Roesed126e012015-05-18 14:08:23 +020061
Rob Herring37fc0ed2011-10-24 08:50:20 +000062/*
63 * Miscellaneous configurable options
64 */
Rob Herring185a5bb2013-06-12 22:24:47 -050065#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Rob Herring37fc0ed2011-10-24 08:50:20 +000066#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */
67#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Rob Herring37fc0ed2011-10-24 08:50:20 +000068/* Print Buffer Size */
69#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
70 sizeof(CONFIG_SYS_PROMPT)+16)
71
72#define CONFIG_SYS_LOAD_ADDR 0x800000
Rob Herring185a5bb2013-06-12 22:24:47 -050073#define CONFIG_SYS_64BIT_LBA
74
Rob Herring37fc0ed2011-10-24 08:50:20 +000075
Rob Herring37fc0ed2011-10-24 08:50:20 +000076/*-----------------------------------------------------------------------
Rob Herring37fc0ed2011-10-24 08:50:20 +000077 * Physical Memory Map
Rob Herring32b4a8a2015-06-21 00:29:55 +010078 * The DRAM is already setup, so do not touch the DT node later.
Rob Herring37fc0ed2011-10-24 08:50:20 +000079 */
Rob Herring32b4a8a2015-06-21 00:29:55 +010080#define CONFIG_NR_DRAM_BANKS 0
Rob Herring37fc0ed2011-10-24 08:50:20 +000081#define PHYS_SDRAM_1_SIZE (4089 << 20)
82#define CONFIG_SYS_MEMTEST_START 0x100000
83#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000)
84
Jason Hobbsa34e8542012-02-01 16:57:56 +000085/* Environment data setup
86*/
87#define CONFIG_ENV_IS_IN_NVRAM
88#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
89#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */
90#define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */
91#define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR
Rob Herring37fc0ed2011-10-24 08:50:20 +000092
93#define CONFIG_SYS_SDRAM_BASE 0x00000000
Rob Herring7b816492012-02-01 16:57:53 +000094#define CONFIG_SYS_TEXT_BASE 0x00008000
Rob Herring37fc0ed2011-10-24 08:50:20 +000095#define CONFIG_SYS_INIT_SP_ADDR 0x01000000
96#define CONFIG_SKIP_LOWLEVEL_INIT
97
98#endif