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Michael Schwingen10c97872011-05-23 00:00:09 +02001/*
2 * (C) Copyright 2009
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * Configuration settings for the
6 * dLAN200 AV Wireless G ("dvlhost") board.
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Michael Schwingen10c97872011-05-23 00:00:09 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14#define CONFIG_IXP425 1
15#define CONFIG_DVLHOST 1
16
Marek Vasut8e807ec2012-03-06 00:45:35 +010017#define CONFIG_MACH_TYPE 1343
18
Michael Schwingen10c97872011-05-23 00:00:09 +020019#define CONFIG_DISPLAY_CPUINFO 1
20#define CONFIG_DISPLAY_BOARDINFO 1
21
22#define CONFIG_IXP_SERIAL
23#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
24#define CONFIG_BAUDRATE 115200
25#define CONFIG_BOOTDELAY 3
26#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
27#define CONFIG_BOARD_EARLY_INIT_F 1
28#define CONFIG_SYS_LDSCRIPT "board/dvlhost/u-boot.lds"
29
30/***************************************************************
31 * U-boot generic defines start here.
32 ***************************************************************/
33/* Size of malloc() pool */
34#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
35
36/* allow to overwrite serial and ethaddr */
37#define CONFIG_ENV_OVERWRITE
38
39/* Command line configuration. */
40#include <config_cmd_default.h>
41
42#define CONFIG_CMD_ELF
43#define CONFIG_PCI
44#ifdef CONFIG_PCI
45#define CONFIG_CMD_PCI
46#define CONFIG_PCI_PNP
47#define CONFIG_IXP_PCI
48#define CONFIG_PCI_SCAN_SHOW
49#define CONFIG_CMD_PCI_ENUM
50#endif
51
52#define CONFIG_BOOTCOMMAND "run boot_flash"
53/* enable passing of ATAGs */
54#define CONFIG_CMDLINE_TAG 1
55#define CONFIG_SETUP_MEMORY_TAGS 1
56#define CONFIG_INITRD_TAG 1
57
58#if defined(CONFIG_CMD_KGDB)
59# define CONFIG_KGDB_BAUDRATE 230400
60/* which serial port to use */
61# define CONFIG_KGDB_SER_INDEX 1
62#endif
63
64/* Miscellaneous configurable options */
65#define CONFIG_SYS_LONGHELP
66#define CONFIG_SYS_PROMPT "=> "
67/* Console I/O Buffer Size */
68#define CONFIG_SYS_CBSIZE 256
69/* Print Buffer Size */
70#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
71/* max number of command args */
72#define CONFIG_SYS_MAXARGS 16
73/* Boot Argument Buffer Size */
74#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
75
76#define CONFIG_SYS_MEMTEST_START 0x00000000
77#define CONFIG_SYS_MEMTEST_END 0x01D80000
78
79/* timer clock - 2* OSC_IN system clock */
80#define CONFIG_IXP425_TIMER_CLK 66666666
81#define CONFIG_SYS_HZ 1000
82
83/* default load address */
84#define CONFIG_SYS_LOAD_ADDR 0x00010000
85
86/* valid baudrates */
87#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
88 115200, 230400 }
89#define CONFIG_SERIAL_RTS_ACTIVE 1
90
Michael Schwingen10c97872011-05-23 00:00:09 +020091/* Expansion bus settings */
92#define CONFIG_SYS_EXP_CS0 0xbd113442
93
94/* SDRAM settings */
95#define CONFIG_NR_DRAM_BANKS 1
96#define PHYS_SDRAM_1 0x00000000
97#define CONFIG_SYS_SDRAM_BASE 0x00000000
98
99/* 32MB SDRAM: 2* 8Mx16, CL3 */
100#define CONFIG_SYS_SDR_CONFIG 0x18
101#define PHYS_SDRAM_1_SIZE 0x02000000
102#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x800
103#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
104#define CONFIG_SYS_DRAM_SIZE PHYS_SDRAM_1_SIZE
105
106/* FLASH organization: one Spansion S29AL032D-04 Flash */
107#define CONFIG_SYS_TEXT_BASE 0x50000000
108#define CONFIG_SYS_MAX_FLASH_BANKS 1
109/* max number of sectors on one chip */
110#define CONFIG_SYS_MAX_FLASH_SECT 140
111#define PHYS_FLASH_1 0x50000000
112#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
113
114#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
115#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
116#define CONFIG_SYS_MONITOR_LEN (256 << 10)
117#define CONFIG_BOARD_SIZE_LIMIT 262144
118
119/* Use common CFI driver */
120#define CONFIG_SYS_FLASH_CFI
121#define CONFIG_FLASH_CFI_DRIVER
122/* no byte writes on IXP4xx */
123#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
124
125/* print 'E' for empty sector on flinfo */
126#define CONFIG_SYS_FLASH_EMPTY_INFO
127
128/* Ethernet */
129
130/* include IXP4xx NPE support */
131#define CONFIG_IXP4XX_NPE 1
132
Michael Schwingen10c97872011-05-23 00:00:09 +0200133/* NPE0 PHY: MII dLAN200 AVmodule, 100BaseT-FDX fixed */
134#define CONFIG_PHY_ADDR 0x18
135/* NPE1 PHY: MII IP175 switch, port 5 is host port */
136#define CONFIG_PHY1_ADDR 0x05
137/* MII PHY management */
138#define CONFIG_MII 1
139/* fixed-speed powerline modem without standard PHY registers on MII */
140#define CONFIG_MII_NPE0_FIXEDLINK 1
141#define CONFIG_MII_NPE0_SPEED 100
142#define CONFIG_MII_NPE0_FULLDUPLEX 1
143/* fixed-speed switch without standard PHY registers on MII */
144#define CONFIG_MII_NPE1_FIXEDLINK 1
145#define CONFIG_MII_NPE1_SPEED 100
146#define CONFIG_MII_NPE1_FULLDUPLEX 1
147
148/* Number of ethernet rx buffers & descriptors */
149#define CONFIG_SYS_RX_ETH_BUFFER 16
150#define CONFIG_RESET_PHY_R 1
151/* ethernet switch connected to MII port */
152#define CONFIG_MII_ETHSWITCH 1
153#define CONFIG_HAS_ETH1 1
154
155#define CONFIG_CMD_DHCP
156#define CONFIG_CMD_NET
157#define CONFIG_CMD_MII
158#define CONFIG_CMD_PING
159#undef CONFIG_CMD_NFS
160
161/* BOOTP options */
162#define CONFIG_BOOTP_BOOTFILESIZE
163#define CONFIG_BOOTP_BOOTPATH
164#define CONFIG_BOOTP_GATEWAY
165#define CONFIG_BOOTP_HOSTNAME
166
167/* Cache Configuration */
168#define CONFIG_SYS_CACHELINE_SIZE 32
169
170/*
171 * environment organization:
172 * one flash sector, embedded in uboot area (bottom bootblock flash)
173 */
174#define CONFIG_ENV_IS_IN_FLASH 1
175#define CONFIG_ENV_SIZE 0x2000
176#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
177#define CONFIG_SYS_USE_PPCENV 1
178
179#define CONFIG_EXTRA_ENV_SETTINGS \
180 "npe_ucode=50040000\0" \
181 "ethprime=NPE1\0" \
182 "ethrotate=no\0" \
183 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root),\0" \
184 "kerneladdr=50050000\0" \
185 "kernelfile=dvlhost/uImage\0" \
186 "rootfile=dvlhost/rootfs\0" \
187 "rootaddr=50170000\0" \
188 "loadaddr=10000\0" \
189 "updateboot_ser=mw.b 10000 ff 40000;" \
190 " loady ${loadaddr};" \
191 " run eraseboot writeboot\0" \
192 "updateboot_net=mw.b 10000 ff 40000;" \
193 " tftp ${loadaddr} dvlhost/u-boot.bin;" \
194 " run eraseboot writeboot\0" \
195 "eraseboot=protect off 50000000 50003fff;" \
196 " protect off 50006000 5003ffff;" \
197 " erase 50000000 50003fff;" \
198 " erase 50006000 5003ffff\0" \
199 "writeboot=cp.b 10000 50000000 4000;" \
200 " cp.b 16000 50006000 3a000\0" \
201 "updateucode=loady;" \
202 " era ${npe_ucode} +${filesize};" \
203 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
204 "updateroot=tftp ${loadaddr} ${rootfile};" \
205 " era ${rootaddr} +${filesize};" \
206 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
207 "updatekern=tftp ${loadaddr} ${kernelfile};" \
208 " era ${kerneladdr} +${filesize};" \
209 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
210 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
211 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
212 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
213 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
214 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
215 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
216 "boot_flash=run flashargs addtty addeth;" \
217 " bootm ${kerneladdr}\0" \
218 "boot_net=run netargs addtty addeth;" \
219 " tftpboot ${loadaddr} ${kernelfile};" \
220 " bootm\0"
221
222/* additions for new relocation code, must be added to all boards */
223#define CONFIG_SYS_INIT_SP_ADDR \
224 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
225
226#endif /* __CONFIG_H */