blob: 38e9018c939b4872b16e69493ffc00f1d1b85da3 [file] [log] [blame]
wdenk024a26b2002-08-21 21:35:08 +00001/*
2 * (C) Copyright 2002
3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
Wolfgang Denk53677ef2008-05-20 16:00:29 +020025#include <linux/types.h> /* for ulong typedef */
wdenk024a26b2002-08-21 21:35:08 +000026
27#ifndef _FPGA_H_
28#define _FPGA_H_
29
30#ifndef CONFIG_MAX_FPGA_DEVICES
31#define CONFIG_MAX_FPGA_DEVICES 5
32#endif
33
wdenk024a26b2002-08-21 21:35:08 +000034/* fpga_xxxx function return value definitions */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020035#define FPGA_SUCCESS 0
36#define FPGA_FAIL -1
wdenk024a26b2002-08-21 21:35:08 +000037
38/* device numbers must be non-negative */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020039#define FPGA_INVALID_DEVICE -1
wdenk024a26b2002-08-21 21:35:08 +000040
41/* root data type defintions */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020042typedef enum { /* typedef fpga_type */
43 fpga_min_type, /* range check value */
44 fpga_xilinx, /* Xilinx Family) */
45 fpga_altera, /* unimplemented */
Stefano Babic3b8ac462010-06-29 11:47:48 +020046 fpga_lattice, /* Lattice family */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020047 fpga_undefined /* invalid range check value */
48} fpga_type; /* end, typedef fpga_type */
wdenk024a26b2002-08-21 21:35:08 +000049
Wolfgang Denk53677ef2008-05-20 16:00:29 +020050typedef struct { /* typedef fpga_desc */
51 fpga_type devtype; /* switch value to select sub-functions */
52 void *devdesc; /* real device descriptor */
53} fpga_desc; /* end, typedef fpga_desc */
wdenk024a26b2002-08-21 21:35:08 +000054
55
56/* root function definitions */
Wolfgang Denke6a857d2011-07-30 13:33:49 +000057extern void fpga_init(void);
58extern int fpga_add(fpga_type devtype, void *desc);
59extern int fpga_count(void);
60extern int fpga_load(int devnum, const void *buf, size_t bsize);
Michal Simek23f4bd72013-05-01 19:02:02 +020061extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size);
Wolfgang Denke6a857d2011-07-30 13:33:49 +000062extern int fpga_dump(int devnum, const void *buf, size_t bsize);
63extern int fpga_info(int devnum);
Michal Simek6631db42013-04-26 15:04:48 +020064extern const fpga_desc *const fpga_validate(int devnum, const void *buf,
65 size_t bsize, char *fn);
wdenk024a26b2002-08-21 21:35:08 +000066
67#endif /* _FPGA_H_ */