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Marek Vasut18a00df2010-03-07 23:35:48 +01001/*
Marek Vasutf9054322010-07-22 16:51:52 +02002 * Voipac PXA270 Support
Marek Vasut18a00df2010-03-07 23:35:48 +01003 *
Marek Vasutf9054322010-07-22 16:51:52 +02004 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
Marek Vasut18a00df2010-03-07 23:35:48 +01005 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#include <common.h>
23#include <asm/arch/hardware.h>
Marek Vasut5d877f42011-08-28 06:30:40 +020024#include <asm/arch/regs-mmc.h>
Marek Vasut4438a452011-11-26 11:17:32 +010025#include <asm/arch/pxa.h>
Marek Vasutc7e61332010-08-08 15:55:51 +020026#include <netdev.h>
Marek Vasut3ba8bf72010-09-09 09:50:39 +020027#include <serial.h>
28#include <asm/io.h>
Marek Vasut18a00df2010-03-07 23:35:48 +010029
30DECLARE_GLOBAL_DATA_PTR;
31
Marek Vasut18a00df2010-03-07 23:35:48 +010032/*
33 * Miscelaneous platform dependent initialisations
34 */
Marek Vasutf9054322010-07-22 16:51:52 +020035int board_init(void)
Marek Vasut18a00df2010-03-07 23:35:48 +010036{
Marek Vasut720a6502010-09-28 15:50:49 +020037 /* We have RAM, disable cache */
38 dcache_disable();
39 icache_disable();
40
Marek Vasut18a00df2010-03-07 23:35:48 +010041 /* memory and cpu-speed are setup before relocation */
42 /* so we do _nothing_ here */
43
Marek Vasutf9054322010-07-22 16:51:52 +020044 /* Arch number of vpac270 */
Marek Vasut18a00df2010-03-07 23:35:48 +010045 gd->bd->bi_arch_number = MACH_TYPE_VPAC270;
46
47 /* adress of boot parameters */
48 gd->bd->bi_boot_params = 0xa0000100;
49
50 return 0;
51}
52
Marek Vasutf9054322010-07-22 16:51:52 +020053struct serial_device *default_serial_console(void)
54{
55 return &serial_ffuart_device;
56}
57
58int dram_init(void)
Marek Vasut18a00df2010-03-07 23:35:48 +010059{
Marek Vasut411b9ea2011-10-31 14:17:21 +010060#ifndef CONFIG_ONENAND
Marek Vasutf68d2a22011-11-26 11:18:57 +010061 pxa2xx_dram_init();
Marek Vasut411b9ea2011-10-31 14:17:21 +010062#endif
Marek Vasut6ef6eb92010-09-23 09:46:57 +020063 gd->ram_size = PHYS_SDRAM_1_SIZE;
Marek Vasut6ef6eb92010-09-23 09:46:57 +020064 return 0;
65}
66
67void dram_init_banksize(void)
68{
Marek Vasut18a00df2010-03-07 23:35:48 +010069 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
Marek Vasut18a00df2010-03-07 23:35:48 +010070 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
Marek Vasut18a00df2010-03-07 23:35:48 +010071
Marek Vasutf97e9c62010-10-03 18:27:36 +020072#ifdef CONFIG_RAM_256M
Marek Vasutf9054322010-07-22 16:51:52 +020073 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
74 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
75#endif
Marek Vasut18a00df2010-03-07 23:35:48 +010076}
77
Marek Vasut5d877f42011-08-28 06:30:40 +020078#ifdef CONFIG_CMD_MMC
79int board_mmc_init(bd_t *bis)
80{
81 pxa_mmc_register(0);
82 return 0;
83}
84#endif
85
Marek Vasutf9054322010-07-22 16:51:52 +020086#ifdef CONFIG_CMD_USB
Marek Vasut18a00df2010-03-07 23:35:48 +010087int usb_board_init(void)
88{
Marek Vasut3ba8bf72010-09-09 09:50:39 +020089 writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
90 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
91 UHCHR);
Marek Vasut18a00df2010-03-07 23:35:48 +010092
Marek Vasut3ba8bf72010-09-09 09:50:39 +020093 writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
Marek Vasut18a00df2010-03-07 23:35:48 +010094
Marek Vasut3ba8bf72010-09-09 09:50:39 +020095 while (readl(UHCHR) & UHCHR_FSBIR)
96 ;
Marek Vasut18a00df2010-03-07 23:35:48 +010097
Marek Vasut3ba8bf72010-09-09 09:50:39 +020098 writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
99 writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
Marek Vasut18a00df2010-03-07 23:35:48 +0100100
101 /* Clear any OTG Pin Hold */
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200102 if (readl(PSSR) & PSSR_OTGPH)
103 writel(readl(PSSR) | PSSR_OTGPH, PSSR);
Marek Vasut18a00df2010-03-07 23:35:48 +0100104
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200105 writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
106 writel(readl(UHCRHDA) | 0x100, UHCRHDA);
Marek Vasut18a00df2010-03-07 23:35:48 +0100107
108 /* Set port power control mask bits, only 3 ports. */
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200109 writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
Marek Vasut18a00df2010-03-07 23:35:48 +0100110
111 /* enable port 2 */
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200112 writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
113 UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
Marek Vasut18a00df2010-03-07 23:35:48 +0100114
115 return 0;
116}
117
118void usb_board_init_fail(void)
119{
120 return;
121}
122
123void usb_board_stop(void)
124{
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200125 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
Marek Vasut18a00df2010-03-07 23:35:48 +0100126 udelay(11);
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200127 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
Marek Vasut18a00df2010-03-07 23:35:48 +0100128
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200129 writel(readl(UHCCOMS) | 1, UHCCOMS);
Marek Vasut18a00df2010-03-07 23:35:48 +0100130 udelay(10);
131
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200132 writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
Marek Vasut18a00df2010-03-07 23:35:48 +0100133
134 return;
135}
Marek Vasutf9054322010-07-22 16:51:52 +0200136#endif
Marek Vasut18a00df2010-03-07 23:35:48 +0100137
138#ifdef CONFIG_DRIVER_DM9000
139int board_eth_init(bd_t *bis)
140{
141 return dm9000_initialize(bis);
142}
143#endif