| Masahiro Yamada | 509eb67 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for UniPhier PH1-sLD8 SoC |
| 3 | * |
| 4 | * Copyright (C) 2014 Panasonic Corporation |
| 5 | * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | /include/ "skeleton.dtsi" |
| 11 | |
| 12 | / { |
| 13 | compatible = "panasonic,ph1-sld8"; |
| 14 | |
| 15 | cpus { |
| 16 | #size-cells = <0>; |
| 17 | #address-cells = <1>; |
| 18 | |
| 19 | cpu@0 { |
| 20 | device_type = "cpu"; |
| 21 | compatible = "arm,cortex-a9"; |
| 22 | reg = <0>; |
| 23 | }; |
| 24 | }; |
| 25 | |
| 26 | soc { |
| 27 | compatible = "simple-bus"; |
| 28 | #address-cells = <1>; |
| 29 | #size-cells = <1>; |
| 30 | ranges; |
| Masahiro Yamada | 625177d | 2014-11-26 18:34:00 +0900 | [diff] [blame^] | 31 | |
| 32 | uart0: serial@54006800 { |
| 33 | compatible = "panasonic,uniphier-uart"; |
| 34 | status = "disabled"; |
| 35 | reg = <0x54006800 0x20>; |
| 36 | clock-frequency = <80000000>; |
| 37 | }; |
| 38 | |
| 39 | uart1: serial@54006900 { |
| 40 | compatible = "panasonic,uniphier-uart"; |
| 41 | status = "disabled"; |
| 42 | reg = <0x54006900 0x20>; |
| 43 | clock-frequency = <80000000>; |
| 44 | }; |
| 45 | |
| 46 | uart2: serial@54006a00 { |
| 47 | compatible = "panasonic,uniphier-uart"; |
| 48 | status = "disabled"; |
| 49 | reg = <0x54006a00 0x20>; |
| 50 | clock-frequency = <80000000>; |
| 51 | }; |
| 52 | |
| 53 | uart3: serial@54006b00 { |
| 54 | compatible = "panasonic,uniphier-uart"; |
| 55 | status = "disabled"; |
| 56 | reg = <0x54006b00 0x20>; |
| 57 | clock-frequency = <80000000>; |
| 58 | }; |
| Masahiro Yamada | 509eb67 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 59 | }; |
| 60 | }; |