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Linus Walleije62b0082012-08-04 05:21:28 +00001/*
2 * (C) Copyright 2012
3 * Linaro
4 * Linus Walleij <linus.walleij@linaro.org>
5 * Common ARM Integrator configuration settings
6 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02007 * SPDX-License-Identifier: GPL-2.0+
Linus Walleije62b0082012-08-04 05:21:28 +00008 */
9
Linus Walleije62b0082012-08-04 05:21:28 +000010#define CONFIG_SYS_TEXT_BASE 0x01000000
11#define CONFIG_SYS_MEMTEST_START 0x100000
12#define CONFIG_SYS_MEMTEST_END 0x10000000
Linus Walleije62b0082012-08-04 05:21:28 +000013#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
14#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
15#define CONFIG_SYS_LONGHELP
Linus Walleije62b0082012-08-04 05:21:28 +000016#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
17#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
18#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
19#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
20#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
21
Linus Walleij3f394e72015-07-27 11:22:48 +020022/* Serial port PL010/PL011 through the device model */
23#define CONFIG_PL01X_SERIAL
Linus Walleij3f394e72015-07-27 11:22:48 +020024#define CONFIG_CONS_INDEX 0
25
Linus Walleije62b0082012-08-04 05:21:28 +000026#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_SETUP_MEMORY_TAGS
Linus Walleije62b0082012-08-04 05:21:28 +000028#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
Linus Walleije62b0082012-08-04 05:21:28 +000029
30/*
31 * There are various dependencies on the core module (CM) fitted
32 * Users should refer to their CM user guide
33 */
34#include "armcoremodule.h"
35
36/*
37 * Initialize and remap the core module, use SPD to detect memory size
38 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
39 * the core module has a CM_INIT register
40 * then the U-Boot initialisation code will
41 * e.g. ARM Boot Monitor or pre-loader is repeated once
42 * (to re-initialise any existing CM_INIT settings to safe values).
43 *
44 * This is usually not the desired behaviour since the platform
45 * will either reboot into the ARM monitor (or pre-loader)
46 * or continuously cycle thru it without U-Boot running,
47 * depending upon the setting of Integrator/CP switch S2-4.
48 *
49 * However it may be needed if Integrator/CP switch S2-1
50 * is set OFF to boot direct into U-Boot.
51 * In that case comment out the line below.
52 */
53#define CONFIG_CM_INIT
54#define CONFIG_CM_REMAP
55#define CONFIG_CM_SPD_DETECT
56
57/*
58 * The ARM boot monitor initializes the board.
59 * However, the default U-Boot code also performs the initialization.
60 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
61 * - see documentation supplied with board for details of how to choose the
62 * image to run at reset/power up
63 * e.g. whether the ARM Boot Monitor runs before U-Boot
64 */
65/* #define CONFIG_SKIP_LOWLEVEL_INIT */
66
67/*
68 * The ARM boot monitor does not relocate U-Boot.
69 * However, the default U-Boot code performs the relocation check,
70 * and may relocate the code if the memory map is changed.
71 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
72 */
73/* #define SKIP_CONFIG_RELOCATE_UBOOT */
74
Linus Walleije62b0082012-08-04 05:21:28 +000075/*
76 * Physical Memory Map
77 */
78#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
79#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
80#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
81#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
82#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
83#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
84 CONFIG_SYS_INIT_RAM_SIZE - \
85 GENERATED_GBL_DATA_SIZE)
86#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
Linus Walleija7b00a72015-04-05 01:48:33 +020087
88/*
89 * FLASH and environment organization
90 * Top varies according to amount fitted
91 * Reserve top 4 blocks of flash
92 * - ARM Boot Monitor
93 * - Unused
94 * - SIB block
95 * - U-Boot environment
96 */
Linus Walleija7b00a72015-04-05 01:48:33 +020097#define CONFIG_SYS_FLASH_CFI 1
98#define CONFIG_FLASH_CFI_DRIVER 1
99#define CONFIG_SYS_FLASH_BASE 0x24000000
100#define CONFIG_SYS_MAX_FLASH_BANKS 1
101
102/* Timeout values in ticks */
103#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
104#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
105#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
106#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */