Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/lib/memset.S |
| 3 | * |
| 4 | * Copyright (C) 1995-2000 Russell King |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * ASM optimised string functions |
| 11 | */ |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 12 | #include <linux/linkage.h> |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 13 | #include <asm/assembler.h> |
| 14 | |
| 15 | .text |
| 16 | .align 5 |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 17 | |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 18 | .syntax unified |
Albert ARIBAUD | 62e9207 | 2015-10-23 18:06:40 +0200 | [diff] [blame^] | 19 | #if defined(CONFIG_SYS_THUMB_BUILD) && !defined(MEMSET_NO_THUMB_BUILD) |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 20 | .thumb |
| 21 | .thumb_func |
| 22 | #endif |
| 23 | ENTRY(memset) |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 24 | ands r3, r0, #3 @ 1 unaligned? |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 25 | mov ip, r0 @ preserve r0 as return value |
| 26 | bne 6f @ 1 |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 27 | /* |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 28 | * we know that the pointer in ip is aligned to a word boundary. |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 29 | */ |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 30 | 1: orr r1, r1, r1, lsl #8 |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 31 | orr r1, r1, r1, lsl #16 |
| 32 | mov r3, r1 |
| 33 | cmp r2, #16 |
| 34 | blt 4f |
| 35 | |
| 36 | #if ! CALGN(1)+0 |
| 37 | |
| 38 | /* |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 39 | * We need 2 extra registers for this loop - use r8 and the LR |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 40 | */ |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 41 | stmfd sp!, {r8, lr} |
| 42 | mov r8, r1 |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 43 | mov lr, r1 |
| 44 | |
| 45 | 2: subs r2, r2, #64 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 46 | stmiage ip!, {r1, r3, r8, lr} @ 64 bytes at a time. |
| 47 | stmiage ip!, {r1, r3, r8, lr} |
| 48 | stmiage ip!, {r1, r3, r8, lr} |
| 49 | stmiage ip!, {r1, r3, r8, lr} |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 50 | bgt 2b |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 51 | ldmfdeq sp!, {r8, pc} @ Now <64 bytes to go. |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 52 | /* |
| 53 | * No need to correct the count; we're only testing bits from now on |
| 54 | */ |
| 55 | tst r2, #32 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 56 | stmiane ip!, {r1, r3, r8, lr} |
| 57 | stmiane ip!, {r1, r3, r8, lr} |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 58 | tst r2, #16 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 59 | stmiane ip!, {r1, r3, r8, lr} |
| 60 | ldmfd sp!, {r8, lr} |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 61 | |
| 62 | #else |
| 63 | |
| 64 | /* |
| 65 | * This version aligns the destination pointer in order to write |
| 66 | * whole cache lines at once. |
| 67 | */ |
| 68 | |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 69 | stmfd sp!, {r4-r8, lr} |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 70 | mov r4, r1 |
| 71 | mov r5, r1 |
| 72 | mov r6, r1 |
| 73 | mov r7, r1 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 74 | mov r8, r1 |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 75 | mov lr, r1 |
| 76 | |
| 77 | cmp r2, #96 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 78 | tstgt ip, #31 |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 79 | ble 3f |
| 80 | |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 81 | and r8, ip, #31 |
| 82 | rsb r8, r8, #32 |
| 83 | sub r2, r2, r8 |
| 84 | movs r8, r8, lsl #(32 - 4) |
| 85 | stmiacs ip!, {r4, r5, r6, r7} |
| 86 | stmiami ip!, {r4, r5} |
| 87 | tst r8, #(1 << 30) |
| 88 | mov r8, r1 |
| 89 | strne r1, [ip], #4 |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 90 | |
| 91 | 3: subs r2, r2, #64 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 92 | stmiage ip!, {r1, r3-r8, lr} |
| 93 | stmiage ip!, {r1, r3-r8, lr} |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 94 | bgt 3b |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 95 | ldmfdeq sp!, {r4-r8, pc} |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 96 | |
| 97 | tst r2, #32 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 98 | stmiane ip!, {r1, r3-r8, lr} |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 99 | tst r2, #16 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 100 | stmiane ip!, {r4-r7} |
| 101 | ldmfd sp!, {r4-r8, lr} |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 102 | |
| 103 | #endif |
| 104 | |
| 105 | 4: tst r2, #8 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 106 | stmiane ip!, {r1, r3} |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 107 | tst r2, #4 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 108 | strne r1, [ip], #4 |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 109 | /* |
| 110 | * When we get here, we've got less than 4 bytes to zero. We |
| 111 | * may have an unaligned pointer as well. |
| 112 | */ |
| 113 | 5: tst r2, #2 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 114 | strbne r1, [ip], #1 |
| 115 | strbne r1, [ip], #1 |
Matthias Weisser | d8834a1 | 2011-03-10 21:36:32 +0000 | [diff] [blame] | 116 | tst r2, #1 |
Stefan Agner | 75d7a0d | 2014-12-18 18:10:33 +0100 | [diff] [blame] | 117 | strbne r1, [ip], #1 |
| 118 | ret lr |
| 119 | |
| 120 | 6: subs r2, r2, #4 @ 1 do we have enough |
| 121 | blt 5b @ 1 bytes to align with? |
| 122 | cmp r3, #2 @ 1 |
| 123 | strblt r1, [ip], #1 @ 1 |
| 124 | strble r1, [ip], #1 @ 1 |
| 125 | strb r1, [ip], #1 @ 1 |
| 126 | add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) |
| 127 | b 1b |
| 128 | ENDPROC(memset) |