| Gong Qianyu | 630532f | 2015-11-11 17:58:38 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Device Tree Include file for Freescale Layerscape-1043A family SoC. |
| 3 | * |
| 4 | * Copyright (C) 2015, Freescale Semiconductor |
| 5 | * |
| 6 | * Mingkai Hu <Mingkai.hu@freescale.com> |
| 7 | * |
| 8 | * This file is licensed under the terms of the GNU General Public |
| 9 | * License version 2. This program is licensed "as is" without any |
| 10 | * warranty of any kind, whether express or implied. |
| 11 | */ |
| 12 | |
| 13 | /dts-v1/; |
| 14 | /include/ "fsl-ls1043a.dtsi" |
| 15 | |
| 16 | / { |
| 17 | model = "LS1043A QDS Board"; |
| 18 | }; |
| 19 | |
| 20 | &i2c0 { |
| 21 | status = "okay"; |
| 22 | pca9547@77 { |
| 23 | compatible = "philips,pca9547"; |
| 24 | reg = <0x77>; |
| 25 | #address-cells = <1>; |
| 26 | #size-cells = <0>; |
| 27 | |
| 28 | i2c@0 { |
| 29 | #address-cells = <1>; |
| 30 | #size-cells = <0>; |
| 31 | reg = <0x0>; |
| 32 | |
| 33 | rtc@68 { |
| 34 | compatible = "dallas,ds3232"; |
| 35 | reg = <0x68>; |
| 36 | /* IRQ10_B */ |
| 37 | interrupts = <0 150 0x4>; |
| 38 | }; |
| 39 | }; |
| 40 | |
| 41 | i2c@2 { |
| 42 | #address-cells = <1>; |
| 43 | #size-cells = <0>; |
| 44 | reg = <0x2>; |
| 45 | |
| 46 | ina220@40 { |
| 47 | compatible = "ti,ina220"; |
| 48 | reg = <0x40>; |
| 49 | shunt-resistor = <1000>; |
| 50 | }; |
| 51 | |
| 52 | ina220@41 { |
| 53 | compatible = "ti,ina220"; |
| 54 | reg = <0x41>; |
| 55 | shunt-resistor = <1000>; |
| 56 | }; |
| 57 | }; |
| 58 | |
| 59 | i2c@3 { |
| 60 | #address-cells = <1>; |
| 61 | #size-cells = <0>; |
| 62 | reg = <0x3>; |
| 63 | |
| 64 | eeprom@56 { |
| 65 | compatible = "at24,24c512"; |
| 66 | reg = <0x56>; |
| 67 | }; |
| 68 | |
| 69 | eeprom@57 { |
| 70 | compatible = "at24,24c512"; |
| 71 | reg = <0x57>; |
| 72 | }; |
| 73 | |
| 74 | adt7461a@4c { |
| 75 | compatible = "adt7461a"; |
| 76 | reg = <0x4c>; |
| 77 | }; |
| 78 | }; |
| 79 | }; |
| 80 | }; |
| 81 | |
| 82 | &ifc { |
| 83 | #address-cells = <2>; |
| 84 | #size-cells = <1>; |
| 85 | /* NOR, NAND Flashes and FPGA on board */ |
| 86 | ranges = <0x0 0x0 0x0 0x60000000 0x08000000 |
| 87 | 0x2 0x0 0x0 0x7e800000 0x00010000 |
| 88 | 0x3 0x0 0x0 0x7fb00000 0x00000100>; |
| 89 | status = "okay"; |
| 90 | |
| 91 | nor@0,0 { |
| 92 | #address-cells = <1>; |
| 93 | #size-cells = <1>; |
| 94 | compatible = "cfi-flash"; |
| 95 | reg = <0x0 0x0 0x8000000>; |
| 96 | bank-width = <2>; |
| 97 | device-width = <1>; |
| 98 | }; |
| 99 | |
| 100 | nand@2,0 { |
| 101 | compatible = "fsl,ifc-nand"; |
| 102 | #address-cells = <1>; |
| 103 | #size-cells = <1>; |
| 104 | reg = <0x1 0x0 0x10000>; |
| 105 | }; |
| 106 | |
| 107 | fpga: board-control@3,0 { |
| 108 | #address-cells = <1>; |
| 109 | #size-cells = <1>; |
| 110 | compatible = "simple-bus"; |
| 111 | reg = <0x3 0x0 0x0000100>; |
| 112 | bank-width = <1>; |
| 113 | device-width = <1>; |
| 114 | ranges = <0 3 0 0x100>; |
| 115 | }; |
| 116 | }; |
| 117 | |
| 118 | &duart0 { |
| 119 | status = "okay"; |
| 120 | }; |
| 121 | |
| 122 | &duart1 { |
| 123 | status = "okay"; |
| 124 | }; |