Eugeniu Rosca | 89c00f0 | 2019-07-09 18:27:13 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Takeshi Kihara | 031fa18 | 2018-04-11 18:37:42 +0900 | [diff] [blame] | 2 | /* |
| 3 | * Device Tree Source for the ebisu board |
| 4 | * |
| 5 | * Copyright (C) 2018 Renesas Electronics Corp. |
| 6 | */ |
| 7 | |
| 8 | /dts-v1/; |
| 9 | #include "r8a77990.dtsi" |
Marek Vasut | 0bb5d24 | 2018-05-31 18:30:17 +0200 | [diff] [blame] | 10 | #include <dt-bindings/gpio/gpio.h> |
Takeshi Kihara | 031fa18 | 2018-04-11 18:37:42 +0900 | [diff] [blame] | 11 | |
| 12 | / { |
| 13 | model = "Renesas Ebisu board based on r8a77990"; |
| 14 | compatible = "renesas,ebisu", "renesas,r8a77990"; |
| 15 | |
| 16 | aliases { |
| 17 | serial0 = &scif2; |
Marek Vasut | 0bb5d24 | 2018-05-31 18:30:17 +0200 | [diff] [blame] | 18 | ethernet0 = &avb; |
Takeshi Kihara | 031fa18 | 2018-04-11 18:37:42 +0900 | [diff] [blame] | 19 | }; |
| 20 | |
| 21 | chosen { |
Eugeniu Rosca | 89c00f0 | 2019-07-09 18:27:13 +0200 | [diff] [blame] | 22 | bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; |
Takeshi Kihara | 031fa18 | 2018-04-11 18:37:42 +0900 | [diff] [blame] | 23 | stdout-path = "serial0:115200n8"; |
| 24 | }; |
| 25 | |
| 26 | memory@48000000 { |
| 27 | device_type = "memory"; |
| 28 | /* first 128MB is reserved for secure area. */ |
| 29 | reg = <0x0 0x48000000 0x0 0x38000000>; |
| 30 | }; |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 31 | |
| 32 | audio_clkout: audio-clkout { |
| 33 | /* |
| 34 | * This is same as <&rcar_sound 0> |
| 35 | * but needed to avoid cs2000/rcar_sound probe dead-lock |
| 36 | */ |
| 37 | compatible = "fixed-clock"; |
| 38 | #clock-cells = <0>; |
| 39 | clock-frequency = <11289600>; |
| 40 | }; |
| 41 | |
| 42 | backlight: backlight { |
| 43 | compatible = "pwm-backlight"; |
| 44 | pwms = <&pwm3 0 50000>; |
| 45 | |
| 46 | brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>; |
| 47 | default-brightness-level = <10>; |
| 48 | |
| 49 | power-supply = <®_12p0v>; |
| 50 | }; |
| 51 | |
| 52 | cvbs-in { |
| 53 | compatible = "composite-video-connector"; |
| 54 | label = "CVBS IN"; |
| 55 | |
| 56 | port { |
| 57 | cvbs_con: endpoint { |
| 58 | remote-endpoint = <&adv7482_ain7>; |
| 59 | }; |
| 60 | }; |
| 61 | }; |
| 62 | |
| 63 | hdmi-in { |
| 64 | compatible = "hdmi-connector"; |
| 65 | label = "HDMI IN"; |
| 66 | type = "a"; |
| 67 | |
| 68 | port { |
| 69 | hdmi_in_con: endpoint { |
| 70 | remote-endpoint = <&adv7482_hdmi>; |
| 71 | }; |
| 72 | }; |
| 73 | }; |
| 74 | |
| 75 | hdmi-out { |
| 76 | compatible = "hdmi-connector"; |
| 77 | type = "a"; |
| 78 | |
| 79 | port { |
| 80 | hdmi_con_out: endpoint { |
| 81 | remote-endpoint = <&adv7511_out>; |
| 82 | }; |
| 83 | }; |
| 84 | }; |
| 85 | |
| 86 | lvds-decoder { |
| 87 | compatible = "thine,thc63lvd1024"; |
| 88 | vcc-supply = <®_3p3v>; |
| 89 | |
| 90 | ports { |
| 91 | #address-cells = <1>; |
| 92 | #size-cells = <0>; |
| 93 | |
| 94 | port@0 { |
| 95 | reg = <0>; |
| 96 | thc63lvd1024_in: endpoint { |
| 97 | remote-endpoint = <&lvds0_out>; |
| 98 | }; |
| 99 | }; |
| 100 | |
| 101 | port@2 { |
| 102 | reg = <2>; |
| 103 | thc63lvd1024_out: endpoint { |
| 104 | remote-endpoint = <&adv7511_in>; |
| 105 | }; |
| 106 | }; |
| 107 | }; |
| 108 | }; |
| 109 | |
| 110 | vga { |
| 111 | compatible = "vga-connector"; |
| 112 | |
| 113 | port { |
| 114 | vga_in: endpoint { |
| 115 | remote-endpoint = <&adv7123_out>; |
| 116 | }; |
| 117 | }; |
| 118 | }; |
| 119 | |
| 120 | vga-encoder { |
| 121 | compatible = "adi,adv7123"; |
| 122 | |
| 123 | ports { |
| 124 | #address-cells = <1>; |
| 125 | #size-cells = <0>; |
| 126 | |
| 127 | port@0 { |
| 128 | reg = <0>; |
| 129 | adv7123_in: endpoint { |
| 130 | remote-endpoint = <&du_out_rgb>; |
| 131 | }; |
| 132 | }; |
| 133 | port@1 { |
| 134 | reg = <1>; |
| 135 | adv7123_out: endpoint { |
| 136 | remote-endpoint = <&vga_in>; |
| 137 | }; |
| 138 | }; |
| 139 | }; |
| 140 | }; |
| 141 | |
| 142 | reg_1p8v: regulator0 { |
| 143 | compatible = "regulator-fixed"; |
| 144 | regulator-name = "fixed-1.8V"; |
| 145 | regulator-min-microvolt = <1800000>; |
| 146 | regulator-max-microvolt = <1800000>; |
| 147 | regulator-boot-on; |
| 148 | regulator-always-on; |
| 149 | }; |
| 150 | |
| 151 | reg_3p3v: regulator1 { |
| 152 | compatible = "regulator-fixed"; |
| 153 | regulator-name = "fixed-3.3V"; |
| 154 | regulator-min-microvolt = <3300000>; |
| 155 | regulator-max-microvolt = <3300000>; |
| 156 | regulator-boot-on; |
| 157 | regulator-always-on; |
| 158 | }; |
| 159 | |
| 160 | vbus0_usb2: regulator-vbus0-usb2 { |
| 161 | compatible = "regulator-fixed"; |
| 162 | |
| 163 | regulator-name = "USB20_VBUS_CN"; |
| 164 | regulator-min-microvolt = <5000000>; |
| 165 | regulator-max-microvolt = <5000000>; |
| 166 | |
| 167 | gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; |
| 168 | enable-active-high; |
| 169 | }; |
| 170 | |
| 171 | rsnd_ak4613: sound { |
| 172 | compatible = "simple-audio-card"; |
| 173 | |
| 174 | simple-audio-card,name = "rsnd-ak4613"; |
| 175 | simple-audio-card,format = "left_j"; |
| 176 | simple-audio-card,bitclock-master = <&sndcpu>; |
| 177 | simple-audio-card,frame-master = <&sndcpu>; |
| 178 | |
| 179 | sndcpu: simple-audio-card,cpu { |
| 180 | sound-dai = <&rcar_sound>; |
| 181 | }; |
| 182 | |
| 183 | sndcodec: simple-audio-card,codec { |
| 184 | sound-dai = <&ak4613>; |
| 185 | }; |
| 186 | }; |
| 187 | |
| 188 | x12_clk: x12 { |
| 189 | compatible = "fixed-clock"; |
| 190 | #clock-cells = <0>; |
| 191 | clock-frequency = <24576000>; |
| 192 | }; |
| 193 | |
| 194 | reg_12p0v: regulator2 { |
| 195 | compatible = "regulator-fixed"; |
| 196 | regulator-name = "D12.0V"; |
| 197 | regulator-min-microvolt = <12000000>; |
| 198 | regulator-max-microvolt = <12000000>; |
| 199 | regulator-boot-on; |
| 200 | regulator-always-on; |
| 201 | }; |
| 202 | |
| 203 | x13_clk: x13 { |
| 204 | compatible = "fixed-clock"; |
| 205 | #clock-cells = <0>; |
| 206 | clock-frequency = <74250000>; |
| 207 | }; |
| 208 | |
| 209 | vcc_sdhi0: regulator-vcc-sdhi0 { |
| 210 | compatible = "regulator-fixed"; |
| 211 | |
| 212 | regulator-name = "SDHI0 Vcc"; |
| 213 | regulator-min-microvolt = <3300000>; |
| 214 | regulator-max-microvolt = <3300000>; |
| 215 | |
| 216 | gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; |
| 217 | enable-active-high; |
| 218 | }; |
| 219 | |
| 220 | vccq_sdhi0: regulator-vccq-sdhi0 { |
| 221 | compatible = "regulator-gpio"; |
| 222 | |
| 223 | regulator-name = "SDHI0 VccQ"; |
| 224 | regulator-min-microvolt = <1800000>; |
| 225 | regulator-max-microvolt = <3300000>; |
| 226 | |
| 227 | gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; |
| 228 | gpios-states = <1>; |
| 229 | states = <3300000 1 |
| 230 | 1800000 0>; |
| 231 | }; |
| 232 | |
| 233 | vcc_sdhi1: regulator-vcc-sdhi1 { |
| 234 | compatible = "regulator-fixed"; |
| 235 | |
| 236 | regulator-name = "SDHI1 Vcc"; |
| 237 | regulator-min-microvolt = <3300000>; |
| 238 | regulator-max-microvolt = <3300000>; |
| 239 | |
| 240 | gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; |
| 241 | enable-active-high; |
| 242 | }; |
| 243 | |
| 244 | vccq_sdhi1: regulator-vccq-sdhi1 { |
| 245 | compatible = "regulator-gpio"; |
| 246 | |
| 247 | regulator-name = "SDHI1 VccQ"; |
| 248 | regulator-min-microvolt = <1800000>; |
| 249 | regulator-max-microvolt = <3300000>; |
| 250 | |
| 251 | gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; |
| 252 | gpios-states = <1>; |
| 253 | states = <3300000 1 |
| 254 | 1800000 0>; |
| 255 | }; |
| 256 | }; |
| 257 | |
| 258 | &audio_clk_a { |
| 259 | clock-frequency = <22579200>; |
Takeshi Kihara | 031fa18 | 2018-04-11 18:37:42 +0900 | [diff] [blame] | 260 | }; |
| 261 | |
Marek Vasut | 0bb5d24 | 2018-05-31 18:30:17 +0200 | [diff] [blame] | 262 | &avb { |
| 263 | pinctrl-0 = <&avb_pins>; |
| 264 | pinctrl-names = "default"; |
| 265 | renesas,no-ether-link; |
| 266 | phy-handle = <&phy0>; |
Marek Vasut | 0bb5d24 | 2018-05-31 18:30:17 +0200 | [diff] [blame] | 267 | status = "okay"; |
| 268 | |
| 269 | phy0: ethernet-phy@0 { |
| 270 | rxc-skew-ps = <1500>; |
| 271 | reg = <0>; |
| 272 | interrupt-parent = <&gpio2>; |
| 273 | interrupts = <21 IRQ_TYPE_LEVEL_LOW>; |
| 274 | reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; |
| 275 | }; |
| 276 | }; |
| 277 | |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 278 | &canfd { |
| 279 | pinctrl-0 = <&canfd0_pins>; |
| 280 | pinctrl-names = "default"; |
| 281 | status = "okay"; |
| 282 | |
| 283 | channel0 { |
| 284 | status = "okay"; |
| 285 | }; |
| 286 | }; |
| 287 | |
| 288 | &csi40 { |
| 289 | status = "okay"; |
| 290 | |
| 291 | ports { |
| 292 | port@0 { |
| 293 | reg = <0>; |
| 294 | |
| 295 | csi40_in: endpoint { |
| 296 | clock-lanes = <0>; |
| 297 | data-lanes = <1 2>; |
| 298 | remote-endpoint = <&adv7482_txa>; |
| 299 | }; |
| 300 | }; |
| 301 | }; |
| 302 | }; |
| 303 | |
| 304 | &du { |
| 305 | pinctrl-0 = <&du_pins>; |
| 306 | pinctrl-names = "default"; |
| 307 | status = "okay"; |
| 308 | |
| 309 | clocks = <&cpg CPG_MOD 724>, |
| 310 | <&cpg CPG_MOD 723>, |
| 311 | <&x13_clk>; |
| 312 | clock-names = "du.0", "du.1", "dclkin.0"; |
| 313 | |
| 314 | ports { |
| 315 | port@0 { |
| 316 | endpoint { |
| 317 | remote-endpoint = <&adv7123_in>; |
| 318 | }; |
| 319 | }; |
| 320 | }; |
| 321 | }; |
| 322 | |
Hiroyuki Yokoyama | 2a1eade | 2018-09-27 19:05:18 +0900 | [diff] [blame] | 323 | &ehci0 { |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 324 | dr_mode = "otg"; |
Hiroyuki Yokoyama | 2a1eade | 2018-09-27 19:05:18 +0900 | [diff] [blame] | 325 | status = "okay"; |
| 326 | }; |
| 327 | |
Takeshi Kihara | 031fa18 | 2018-04-11 18:37:42 +0900 | [diff] [blame] | 328 | &extal_clk { |
| 329 | clock-frequency = <48000000>; |
| 330 | }; |
| 331 | |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 332 | &hsusb { |
| 333 | dr_mode = "otg"; |
| 334 | status = "okay"; |
| 335 | }; |
| 336 | |
| 337 | &i2c0 { |
| 338 | status = "okay"; |
| 339 | |
Eugeniu Rosca | 89c00f0 | 2019-07-09 18:27:13 +0200 | [diff] [blame] | 340 | io_expander: gpio@20 { |
| 341 | compatible = "onnn,pca9654"; |
| 342 | reg = <0x20>; |
| 343 | gpio-controller; |
| 344 | #gpio-cells = <2>; |
| 345 | interrupt-parent = <&gpio2>; |
| 346 | interrupts = <22 IRQ_TYPE_LEVEL_LOW>; |
| 347 | }; |
| 348 | |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 349 | hdmi-encoder@39 { |
| 350 | compatible = "adi,adv7511w"; |
| 351 | reg = <0x39>; |
| 352 | interrupt-parent = <&gpio1>; |
| 353 | interrupts = <1 IRQ_TYPE_LEVEL_LOW>; |
| 354 | |
| 355 | adi,input-depth = <8>; |
| 356 | adi,input-colorspace = "rgb"; |
| 357 | adi,input-clock = "1x"; |
| 358 | adi,input-style = <1>; |
| 359 | adi,input-justification = "evenly"; |
| 360 | |
| 361 | ports { |
| 362 | #address-cells = <1>; |
| 363 | #size-cells = <0>; |
| 364 | |
| 365 | port@0 { |
| 366 | reg = <0>; |
| 367 | adv7511_in: endpoint { |
| 368 | remote-endpoint = <&thc63lvd1024_out>; |
| 369 | }; |
| 370 | }; |
| 371 | |
| 372 | port@1 { |
| 373 | reg = <1>; |
| 374 | adv7511_out: endpoint { |
| 375 | remote-endpoint = <&hdmi_con_out>; |
| 376 | }; |
| 377 | }; |
| 378 | }; |
| 379 | }; |
| 380 | |
| 381 | video-receiver@70 { |
| 382 | compatible = "adi,adv7482"; |
| 383 | reg = <0x70>; |
| 384 | |
| 385 | #address-cells = <1>; |
| 386 | #size-cells = <0>; |
| 387 | |
| 388 | interrupt-parent = <&gpio0>; |
| 389 | interrupt-names = "intrq1", "intrq2"; |
| 390 | interrupts = <7 IRQ_TYPE_LEVEL_LOW>, |
| 391 | <17 IRQ_TYPE_LEVEL_LOW>; |
| 392 | |
| 393 | port@7 { |
| 394 | reg = <7>; |
| 395 | |
| 396 | adv7482_ain7: endpoint { |
| 397 | remote-endpoint = <&cvbs_con>; |
| 398 | }; |
| 399 | }; |
| 400 | |
| 401 | port@8 { |
| 402 | reg = <8>; |
| 403 | |
| 404 | adv7482_hdmi: endpoint { |
| 405 | remote-endpoint = <&hdmi_in_con>; |
| 406 | }; |
| 407 | }; |
| 408 | |
| 409 | port@a { |
Eugeniu Rosca | 89c00f0 | 2019-07-09 18:27:13 +0200 | [diff] [blame] | 410 | reg = <10>; |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 411 | |
| 412 | adv7482_txa: endpoint { |
| 413 | clock-lanes = <0>; |
| 414 | data-lanes = <1 2>; |
| 415 | remote-endpoint = <&csi40_in>; |
| 416 | }; |
| 417 | }; |
| 418 | }; |
| 419 | }; |
| 420 | |
| 421 | &i2c3 { |
| 422 | status = "okay"; |
| 423 | |
| 424 | ak4613: codec@10 { |
| 425 | compatible = "asahi-kasei,ak4613"; |
| 426 | #sound-dai-cells = <0>; |
| 427 | reg = <0x10>; |
| 428 | clocks = <&rcar_sound 3>; |
| 429 | |
| 430 | asahi-kasei,in1-single-end; |
| 431 | asahi-kasei,in2-single-end; |
| 432 | asahi-kasei,out1-single-end; |
| 433 | asahi-kasei,out2-single-end; |
| 434 | asahi-kasei,out3-single-end; |
| 435 | asahi-kasei,out4-single-end; |
| 436 | asahi-kasei,out5-single-end; |
| 437 | asahi-kasei,out6-single-end; |
| 438 | }; |
| 439 | |
| 440 | cs2000: clk-multiplier@4f { |
| 441 | #clock-cells = <0>; |
| 442 | compatible = "cirrus,cs2000-cp"; |
| 443 | reg = <0x4f>; |
| 444 | clocks = <&audio_clkout>, <&x12_clk>; |
| 445 | clock-names = "clk_in", "ref_clk"; |
| 446 | |
| 447 | assigned-clocks = <&cs2000>; |
| 448 | assigned-clock-rates = <24576000>; /* 1/1 divide */ |
| 449 | }; |
| 450 | }; |
| 451 | |
Eugeniu Rosca | 89c00f0 | 2019-07-09 18:27:13 +0200 | [diff] [blame] | 452 | &i2c_dvfs { |
| 453 | status = "okay"; |
| 454 | |
| 455 | clock-frequency = <400000>; |
| 456 | |
| 457 | pmic: pmic@30 { |
| 458 | pinctrl-0 = <&irq0_pins>; |
| 459 | pinctrl-names = "default"; |
| 460 | |
| 461 | compatible = "rohm,bd9571mwv"; |
| 462 | reg = <0x30>; |
| 463 | interrupt-parent = <&intc_ex>; |
| 464 | interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
| 465 | interrupt-controller; |
| 466 | #interrupt-cells = <2>; |
| 467 | gpio-controller; |
| 468 | #gpio-cells = <2>; |
| 469 | rohm,ddr-backup-power = <0x1>; |
| 470 | rohm,rstbmode-level; |
| 471 | }; |
| 472 | }; |
| 473 | |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 474 | &lvds0 { |
| 475 | status = "okay"; |
| 476 | |
| 477 | clocks = <&cpg CPG_MOD 727>, |
| 478 | <&x13_clk>, |
| 479 | <&extal_clk>; |
| 480 | clock-names = "fck", "dclkin.0", "extal"; |
| 481 | |
| 482 | ports { |
| 483 | port@1 { |
| 484 | lvds0_out: endpoint { |
| 485 | remote-endpoint = <&thc63lvd1024_in>; |
| 486 | }; |
| 487 | }; |
| 488 | }; |
| 489 | }; |
| 490 | |
| 491 | &lvds1 { |
Eugeniu Rosca | 89c00f0 | 2019-07-09 18:27:13 +0200 | [diff] [blame] | 492 | /* |
| 493 | * Even though the LVDS1 output is not connected, the encoder must be |
| 494 | * enabled to supply a pixel clock to the DU for the DPAD output when |
| 495 | * LVDS0 is in use. |
| 496 | */ |
| 497 | status = "okay"; |
| 498 | |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 499 | clocks = <&cpg CPG_MOD 727>, |
| 500 | <&x13_clk>, |
| 501 | <&extal_clk>; |
| 502 | clock-names = "fck", "dclkin.0", "extal"; |
| 503 | }; |
| 504 | |
Marek Vasut | cbff9f8 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 505 | &ohci0 { |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 506 | dr_mode = "otg"; |
| 507 | status = "okay"; |
| 508 | }; |
| 509 | |
| 510 | &pcie_bus_clk { |
| 511 | clock-frequency = <100000000>; |
| 512 | }; |
| 513 | |
| 514 | &pciec0 { |
Marek Vasut | cbff9f8 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 515 | status = "okay"; |
| 516 | }; |
| 517 | |
Marek Vasut | 0bb5d24 | 2018-05-31 18:30:17 +0200 | [diff] [blame] | 518 | &pfc { |
| 519 | avb_pins: avb { |
| 520 | mux { |
| 521 | groups = "avb_link", "avb_mii"; |
| 522 | function = "avb"; |
| 523 | }; |
| 524 | }; |
Marek Vasut | 65dcc80 | 2018-06-13 21:44:50 +0200 | [diff] [blame] | 525 | |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 526 | canfd0_pins: canfd0 { |
| 527 | groups = "canfd0_data"; |
| 528 | function = "canfd0"; |
| 529 | }; |
| 530 | |
| 531 | du_pins: du { |
| 532 | groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; |
| 533 | function = "du"; |
| 534 | }; |
| 535 | |
Eugeniu Rosca | 89c00f0 | 2019-07-09 18:27:13 +0200 | [diff] [blame] | 536 | irq0_pins: irq0 { |
| 537 | groups = "intc_ex_irq0"; |
| 538 | function = "intc_ex"; |
| 539 | }; |
| 540 | |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 541 | pwm3_pins: pwm3 { |
| 542 | groups = "pwm3_b"; |
| 543 | function = "pwm3"; |
| 544 | }; |
| 545 | |
| 546 | pwm5_pins: pwm5 { |
| 547 | groups = "pwm5_a"; |
| 548 | function = "pwm5"; |
| 549 | }; |
| 550 | |
| 551 | sdhi0_pins: sd0 { |
| 552 | groups = "sdhi0_data4", "sdhi0_ctrl"; |
| 553 | function = "sdhi0"; |
| 554 | power-source = <3300>; |
| 555 | }; |
| 556 | |
| 557 | sdhi0_pins_uhs: sd0_uhs { |
| 558 | groups = "sdhi0_data4", "sdhi0_ctrl"; |
| 559 | function = "sdhi0"; |
| 560 | power-source = <1800>; |
| 561 | }; |
| 562 | |
| 563 | sdhi1_pins: sd1 { |
| 564 | groups = "sdhi1_data4", "sdhi1_ctrl"; |
| 565 | function = "sdhi1"; |
| 566 | power-source = <3300>; |
| 567 | }; |
| 568 | |
| 569 | sdhi1_pins_uhs: sd1_uhs { |
| 570 | groups = "sdhi1_data4", "sdhi1_ctrl"; |
| 571 | function = "sdhi1"; |
| 572 | power-source = <1800>; |
| 573 | }; |
| 574 | |
| 575 | sdhi3_pins: sd3 { |
| 576 | groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds"; |
| 577 | function = "sdhi3"; |
| 578 | power-source = <1800>; |
| 579 | }; |
| 580 | |
| 581 | sound_pins: sound { |
| 582 | groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data"; |
| 583 | function = "ssi"; |
| 584 | }; |
| 585 | |
| 586 | sound_clk_pins: sound_clk { |
| 587 | groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a", |
| 588 | "audio_clkout_a", "audio_clkout1_a"; |
| 589 | function = "audio_clk"; |
| 590 | }; |
| 591 | |
| 592 | scif2_pins: scif2 { |
| 593 | groups = "scif2_data_a"; |
| 594 | function = "scif2"; |
| 595 | }; |
| 596 | |
Marek Vasut | cbff9f8 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 597 | usb0_pins: usb { |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 598 | groups = "usb0_b", "usb0_id"; |
Hiroyuki Yokoyama | 2a1eade | 2018-09-27 19:05:18 +0900 | [diff] [blame] | 599 | function = "usb0"; |
| 600 | }; |
Marek Vasut | cbff9f8 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 601 | |
| 602 | usb30_pins: usb30 { |
| 603 | groups = "usb30"; |
| 604 | function = "usb30"; |
| 605 | }; |
Hiroyuki Yokoyama | 2a1eade | 2018-09-27 19:05:18 +0900 | [diff] [blame] | 606 | }; |
| 607 | |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 608 | &pwm3 { |
| 609 | pinctrl-0 = <&pwm3_pins>; |
| 610 | pinctrl-names = "default"; |
| 611 | |
| 612 | status = "okay"; |
| 613 | }; |
| 614 | |
| 615 | &pwm5 { |
| 616 | pinctrl-0 = <&pwm5_pins>; |
| 617 | pinctrl-names = "default"; |
| 618 | |
| 619 | status = "okay"; |
| 620 | }; |
| 621 | |
| 622 | &rcar_sound { |
| 623 | pinctrl-0 = <&sound_pins &sound_clk_pins>; |
| 624 | pinctrl-names = "default"; |
| 625 | |
| 626 | /* Single DAI */ |
| 627 | #sound-dai-cells = <0>; |
| 628 | |
| 629 | /* audio_clkout0/1/2/3 */ |
| 630 | #clock-cells = <1>; |
| 631 | clock-frequency = <12288000 11289600>; |
| 632 | clkout-lr-synchronous; |
| 633 | |
| 634 | status = "okay"; |
| 635 | |
| 636 | /* update <audio_clk_b> to <cs2000> */ |
| 637 | clocks = <&cpg CPG_MOD 1005>, |
| 638 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, |
| 639 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, |
| 640 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, |
| 641 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, |
| 642 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, |
| 643 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
| 644 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, |
| 645 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, |
| 646 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, |
| 647 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, |
| 648 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
| 649 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
| 650 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
| 651 | <&audio_clk_a>, <&cs2000>, <&audio_clk_c>, |
| 652 | <&cpg CPG_CORE R8A77990_CLK_ZA2>; |
| 653 | |
| 654 | rcar_sound,dai { |
| 655 | dai0 { |
| 656 | playback = <&ssi0 &src0 &dvc0>; |
| 657 | capture = <&ssi1 &src1 &dvc1>; |
| 658 | }; |
| 659 | }; |
| 660 | |
| 661 | }; |
| 662 | |
Marek Vasut | cbff9f8 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 663 | &rwdt { |
| 664 | timeout-sec = <60>; |
Marek Vasut | bc19d28 | 2018-05-31 19:56:42 +0200 | [diff] [blame] | 665 | status = "okay"; |
| 666 | }; |
| 667 | |
Takeshi Kihara | 031fa18 | 2018-04-11 18:37:42 +0900 | [diff] [blame] | 668 | &scif2 { |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 669 | pinctrl-0 = <&scif2_pins>; |
| 670 | pinctrl-names = "default"; |
| 671 | |
Takeshi Kihara | 031fa18 | 2018-04-11 18:37:42 +0900 | [diff] [blame] | 672 | status = "okay"; |
| 673 | }; |
Marek Vasut | cbff9f8 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 674 | |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 675 | &ssi1 { |
| 676 | shared-pin; |
| 677 | }; |
| 678 | |
Marek Vasut | cbff9f8 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 679 | &usb2_phy0 { |
| 680 | pinctrl-0 = <&usb0_pins>; |
| 681 | pinctrl-names = "default"; |
| 682 | |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 683 | vbus-supply = <&vbus0_usb2>; |
| 684 | status = "okay"; |
| 685 | }; |
| 686 | |
| 687 | &usb3_peri0 { |
| 688 | companion = <&xhci0>; |
| 689 | status = "okay"; |
| 690 | }; |
| 691 | |
| 692 | &vin4 { |
Marek Vasut | cbff9f8 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 693 | status = "okay"; |
| 694 | }; |
| 695 | |
Eugeniu Rosca | 89c00f0 | 2019-07-09 18:27:13 +0200 | [diff] [blame] | 696 | &vin5 { |
| 697 | status = "okay"; |
| 698 | }; |
| 699 | |
Marek Vasut | cbff9f8 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 700 | &xhci0 { |
| 701 | pinctrl-0 = <&usb30_pins>; |
| 702 | pinctrl-names = "default"; |
| 703 | |
| 704 | status = "okay"; |
| 705 | }; |
Marek Vasut | 317d13a | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 706 | |
| 707 | &sdhi0 { |
| 708 | pinctrl-0 = <&sdhi0_pins>; |
| 709 | pinctrl-1 = <&sdhi0_pins_uhs>; |
| 710 | pinctrl-names = "default", "state_uhs"; |
| 711 | |
| 712 | vmmc-supply = <&vcc_sdhi0>; |
| 713 | vqmmc-supply = <&vccq_sdhi0>; |
| 714 | cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; |
| 715 | wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; |
| 716 | bus-width = <4>; |
| 717 | sd-uhs-sdr50; |
| 718 | sd-uhs-sdr104; |
| 719 | status = "okay"; |
| 720 | }; |
| 721 | |
| 722 | &sdhi1 { |
| 723 | pinctrl-0 = <&sdhi1_pins>; |
| 724 | pinctrl-1 = <&sdhi1_pins_uhs>; |
| 725 | pinctrl-names = "default", "state_uhs"; |
| 726 | |
| 727 | vmmc-supply = <&vcc_sdhi1>; |
| 728 | vqmmc-supply = <&vccq_sdhi1>; |
| 729 | cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>; |
| 730 | bus-width = <4>; |
| 731 | sd-uhs-sdr50; |
| 732 | sd-uhs-sdr104; |
| 733 | status = "okay"; |
| 734 | }; |
| 735 | |
| 736 | &sdhi3 { |
| 737 | /* used for on-board 8bit eMMC */ |
| 738 | pinctrl-0 = <&sdhi3_pins>; |
| 739 | pinctrl-1 = <&sdhi3_pins>; |
| 740 | pinctrl-names = "default", "state_uhs"; |
| 741 | |
| 742 | vmmc-supply = <®_3p3v>; |
| 743 | vqmmc-supply = <®_1p8v>; |
| 744 | mmc-hs200-1_8v; |
| 745 | mmc-hs400-1_8v; |
| 746 | bus-width = <8>; |
| 747 | non-removable; |
| 748 | status = "okay"; |
| 749 | }; |