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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Hans de Goede51637af2015-02-04 12:14:56 +01002/*
3 * DRAM init helper functions
4 *
5 * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
Hans de Goede51637af2015-02-04 12:14:56 +01006 */
7
8#include <common.h>
Andre Przywara1ea4fac2016-05-12 12:14:41 +01009#include <asm/barriers.h>
Hans de Goede51637af2015-02-04 12:14:56 +010010#include <asm/io.h>
11#include <asm/arch/dram.h>
12
13/*
14 * Wait up to 1s for value to be set in given part of reg.
15 */
16void mctl_await_completion(u32 *reg, u32 mask, u32 val)
17{
18 unsigned long tmo = timer_get_us() + 1000000;
19
20 while ((readl(reg) & mask) != val) {
21 if (timer_get_us() > tmo)
22 panic("Timeout initialising DRAM\n");
23 }
24}
25
26/*
27 * Test if memory at offset offset matches memory at begin of DRAM
28 */
29bool mctl_mem_matches(u32 offset)
30{
31 /* Try to write different values to RAM at two addresses */
32 writel(0, CONFIG_SYS_SDRAM_BASE);
Alexander Graf0ea5a042016-03-29 17:29:09 +020033 writel(0xaa55aa55, (ulong)CONFIG_SYS_SDRAM_BASE + offset);
Tom Rinia78cd862016-08-01 18:54:53 -040034 dsb();
Hans de Goede51637af2015-02-04 12:14:56 +010035 /* Check if the same value is actually observed when reading back */
36 return readl(CONFIG_SYS_SDRAM_BASE) ==
Alexander Graf0ea5a042016-03-29 17:29:09 +020037 readl((ulong)CONFIG_SYS_SDRAM_BASE + offset);
Hans de Goede51637af2015-02-04 12:14:56 +010038}