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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +00002/*
Tony Dinh648f8d52022-01-25 19:33:44 -08003 * Copyright (C) 2022 Tony Dinh <mibodhi@gmai.com>
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +00004 * Copyright (C) 2013 Suriyan Ramasami <suriyan.r@gmail.com>
5 *
6 * Based on dockstar.h originally written by
7 * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
8 *
9 * Based on sheevaplug.h originally written by
10 * Prafulla Wadaskar <prafulla@marvell.com>
11 * (C) Copyright 2009
12 * Marvell Semiconductor <www.marvell.com>
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000013 */
14
15#ifndef _CONFIG_GOFLEXHOME_H
16#define _CONFIG_GOFLEXHOME_H
17
Tony Dinh648f8d52022-01-25 19:33:44 -080018#include <linux/bitops.h>
19
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000020/*
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000021 * Default GPIO configuration and LED status
22 */
23#define GOFLEXHOME_OE_LOW (~(0))
24#define GOFLEXHOME_OE_HIGH (~(0))
Tony Dinh648f8d52022-01-25 19:33:44 -080025#define GOFLEXHOME_OE_VAL_LOW BIT(29) /* USB_PWEN low */
26#define GOFLEXHOME_OE_VAL_HIGH BIT(17) /* LED pin high */
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000027
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000028#include "mv-common.h"
29
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000030/*
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000031 * Default environment variables
32 */
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000033
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000034#define CONFIG_EXTRA_ENV_SETTINGS \
35 "console=console=ttyS0,115200\0" \
36 "mtdids=nand0=orion_nand\0" \
Tony Dinh648f8d52022-01-25 19:33:44 -080037 "mtdparts=" CONFIG_MTDPARTS_DEFAULT \
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000038 "kernel=/boot/uImage\0" \
39 "bootargs_root=ubi.mtd=root root=ubi0:root rootfstype=ubifs ro\0"
40
41/*
42 * Ethernet Driver configuration
43 */
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000044#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
45#define CONFIG_PHY_BASE_ADR 0
Tony Dinh648f8d52022-01-25 19:33:44 -080046#ifdef CONFIG_RESET_PHY_R
47#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */
48#endif
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000049
Tony Dinh296c32b2021-07-29 20:02:42 -070050/* SATA driver configuration */
Tony Dinh296c32b2021-07-29 20:02:42 -070051#define CONFIG_SYS_SATA_MAX_DEVICE 1
52#define CONFIG_LBA48
Tony Dinh296c32b2021-07-29 20:02:42 -070053
Suriyan Ramasami0ad6c342013-04-11 07:17:25 +000054#endif /* _CONFIG_GOFLEXHOME_H */