| Masami Hiramatsu | 2f1f797 | 2021-06-04 18:44:59 +0900 | [diff] [blame] | 1 | // SPDX-License-Identifier: BSD-2-Clause-Patent |
| 2 | // |
| 3 | // Copyright (c) 2021, Linaro Limited. All rights reserved. |
| 4 | // |
| 5 | |
| 6 | / { |
| 7 | aliases { |
| 8 | spi_nor = &spi_nor; |
| 9 | i2c0 = &i2c0; |
| 10 | }; |
| 11 | |
| 12 | spi_nor: spi@54800000 { |
| 13 | compatible = "socionext,synquacer-spi"; |
| 14 | reg = <0x00 0x54800000 0x00 0x1000>; |
| 15 | interrupts = <0x00 0x9c 0x04 0x00 0x9d 0x04 0x00 0x9e 0x04>; |
| 16 | clocks = <&clk_alw_1_8>; |
| 17 | clock-names = "iHCLK"; |
| 18 | socionext,use-rtm; |
| 19 | socionext,set-aces; |
| 20 | #address-cells = <1>; |
| 21 | #size-cells = <0>; |
| 22 | status = "okay"; |
| 23 | active_clk_edges; |
| 24 | chipselect_num = <1>; |
| 25 | |
| 26 | spi-flash@0 { |
| 27 | #address-cells = <1>; |
| 28 | #size-cells = <1>; |
| 29 | compatible = "jedec,spi-nor"; |
| 30 | reg = <0>; /* Chip select 0 */ |
| 31 | spi-max-frequency = <31250000>; |
| 32 | spi-rx-bus-width = <0x1>; |
| 33 | spi-tx-bus-width = <0x1>; |
| 34 | }; |
| 35 | }; |
| 36 | |
| 37 | i2c0: i2c@51200000 { |
| 38 | compatible = "socionext,synquacer-i2c"; |
| 39 | reg = <0x0 0x51200000 0x0 0x1000>; |
| 40 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; |
| 41 | clocks = <&clk_i2c>; |
| 42 | clock-names = "pclk"; |
| 43 | clock-frequency = <400000>; |
| 44 | #address-cells = <1>; |
| 45 | #size-cells = <0>; |
| 46 | status = "okay"; |
| 47 | |
| 48 | pcf8563: rtc@51 { |
| 49 | compatible = "nxp,pcf8563"; |
| 50 | reg = <0x51>; |
| 51 | }; |
| 52 | }; |
| 53 | |
| 54 | firmware { |
| 55 | optee { |
| 56 | status = "okay"; |
| 57 | }; |
| 58 | }; |
| 59 | }; |
| 60 | |
| 61 | &smmu { |
| 62 | status = "okay"; |
| 63 | }; |
| 64 | |
| 65 | &pcie0 { |
| 66 | status = "okay"; |
| 67 | }; |
| 68 | |
| 69 | &pcie1 { |
| 70 | status = "okay"; |
| 71 | }; |
| 72 | |
| 73 | &sdhci { |
| 74 | status = "okay"; |
| 75 | }; |