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Eugeniy Paltsev15736e22019-02-25 18:35:28 +03001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Synopsys DesignWare Multimedia Card Interface driver
4 * extensions used in various Synopsys ARC devboards.
5 *
6 * Copyright (C) 2019 Synopsys
7 * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
8 */
9
Eugeniy Paltsev15736e22019-02-25 18:35:28 +030010#include <clk.h>
11#include <dm.h>
12#include <dwmmc.h>
13#include <errno.h>
14#include <fdtdec.h>
Simon Glass336d4612020-02-03 07:36:16 -070015#include <dm/device_compat.h>
Eugeniy Paltsev15736e22019-02-25 18:35:28 +030016#include <linux/libfdt.h>
17#include <linux/err.h>
18#include <malloc.h>
19
20#define CLOCK_MIN 400000 /* 400 kHz */
21#define FIFO_MIN 8
22#define FIFO_MAX 4096
23
24struct snps_dwmci_plat {
25 struct mmc_config cfg;
26 struct mmc mmc;
27};
28
29struct snps_dwmci_priv_data {
30 struct dwmci_host host;
31 u32 f_max;
32};
33
34static int snps_dwmmc_clk_setup(struct udevice *dev)
35{
36 struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
37 struct dwmci_host *host = &priv->host;
38
39 struct clk clk_ciu, clk_biu;
40 int ret;
41
42 ret = clk_get_by_name(dev, "ciu", &clk_ciu);
43 if (ret)
44 goto clk_err;
45
46 ret = clk_enable(&clk_ciu);
47 if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
Sean Andersonc9309f42023-12-16 14:38:42 -050048 goto clk_err;
Eugeniy Paltsev15736e22019-02-25 18:35:28 +030049
50 host->bus_hz = clk_get_rate(&clk_ciu);
51 if (host->bus_hz < CLOCK_MIN) {
52 ret = -EINVAL;
53 goto clk_err_ciu_dis;
54 }
55
56 ret = clk_get_by_name(dev, "biu", &clk_biu);
57 if (ret)
58 goto clk_err_ciu_dis;
59
60 ret = clk_enable(&clk_biu);
61 if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
Sean Andersonc9309f42023-12-16 14:38:42 -050062 goto clk_err_ciu_dis;
Eugeniy Paltsev15736e22019-02-25 18:35:28 +030063
64 return 0;
65
Eugeniy Paltsev15736e22019-02-25 18:35:28 +030066clk_err_ciu_dis:
67 clk_disable(&clk_ciu);
Eugeniy Paltsev15736e22019-02-25 18:35:28 +030068clk_err:
69 dev_err(dev, "failed to setup clocks, ret %d\n", ret);
70
71 return ret;
72}
73
Simon Glassd1998a92020-12-03 16:55:21 -070074static int snps_dwmmc_of_to_plat(struct udevice *dev)
Eugeniy Paltsev15736e22019-02-25 18:35:28 +030075{
76 struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
77 struct dwmci_host *host = &priv->host;
78 u32 fifo_depth;
79 int ret;
80
Masahiro Yamada702e57e2020-08-04 14:14:43 +090081 host->ioaddr = dev_read_addr_ptr(dev);
Eugeniy Paltsev15736e22019-02-25 18:35:28 +030082
83 /*
Sam Protsenkoffd62e02024-08-07 22:14:17 -050084 * If fifo-depth is unset don't set fifo_depth - we will try to
Eugeniy Paltsev15736e22019-02-25 18:35:28 +030085 * auto detect it.
86 */
87 ret = dev_read_u32(dev, "fifo-depth", &fifo_depth);
88 if (!ret) {
89 if (fifo_depth < FIFO_MIN || fifo_depth > FIFO_MAX)
90 return -EINVAL;
91
Sam Protsenkoffd62e02024-08-07 22:14:17 -050092 host->fifo_depth = fifo_depth;
Eugeniy Paltsev15736e22019-02-25 18:35:28 +030093 }
94
95 host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
96 if (host->buswidth != 1 && host->buswidth != 4 && host->buswidth != 8)
97 return -EINVAL;
98
99 /*
100 * If max-frequency is unset don't set priv->f_max - we will use
101 * host->bus_hz in probe() instead.
102 */
103 ret = dev_read_u32(dev, "max-frequency", &priv->f_max);
104 if (!ret && priv->f_max < CLOCK_MIN)
105 return -EINVAL;
106
107 host->fifo_mode = dev_read_bool(dev, "fifo-mode");
108 host->name = dev->name;
109 host->dev_index = 0;
110 host->priv = priv;
111
112 return 0;
113}
114
115int snps_dwmmc_getcd(struct udevice *dev)
116{
117 struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
118 struct dwmci_host *host = &priv->host;
119
120 return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
121}
122
123struct dm_mmc_ops snps_dwmci_dm_ops;
124
125static int snps_dwmmc_probe(struct udevice *dev)
126{
127#ifdef CONFIG_BLK
Simon Glassc69cda22020-12-03 16:55:20 -0700128 struct snps_dwmci_plat *plat = dev_get_plat(dev);
Eugeniy Paltsev15736e22019-02-25 18:35:28 +0300129#endif
130 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
131 struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
132 struct dwmci_host *host = &priv->host;
133 unsigned int clock_max;
134 int ret;
135
136 /* Extend generic 'dm_dwmci_ops' with our 'getcd' implementation */
137 memcpy(&snps_dwmci_dm_ops, &dm_dwmci_ops, sizeof(struct dm_mmc_ops));
138 snps_dwmci_dm_ops.get_cd = snps_dwmmc_getcd;
139
140 ret = snps_dwmmc_clk_setup(dev);
141 if (ret)
142 return ret;
143
144 if (!priv->f_max)
145 clock_max = host->bus_hz;
146 else
147 clock_max = min_t(unsigned int, host->bus_hz, priv->f_max);
148
149#ifdef CONFIG_BLK
150 dwmci_setup_cfg(&plat->cfg, host, clock_max, CLOCK_MIN);
151 host->mmc = &plat->mmc;
152#else
153 ret = add_dwmci(host, clock_max, CLOCK_MIN);
154 if (ret)
155 return ret;
156#endif
157 host->mmc->priv = &priv->host;
158 upriv->mmc = host->mmc;
159 host->mmc->dev = dev;
160
161 return dwmci_probe(dev);
162}
163
164static int snps_dwmmc_bind(struct udevice *dev)
165{
166#ifdef CONFIG_BLK
Simon Glassc69cda22020-12-03 16:55:20 -0700167 struct snps_dwmci_plat *plat = dev_get_plat(dev);
Eugeniy Paltsev15736e22019-02-25 18:35:28 +0300168 int ret;
169
170 ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
171 if (ret)
172 return ret;
173#endif
174
175 return 0;
176}
177
178static const struct udevice_id snps_dwmmc_ids[] = {
179 { .compatible = "snps,dw-mshc" },
180 { }
181};
182
183U_BOOT_DRIVER(snps_dwmmc_drv) = {
184 .name = "snps_dw_mmc",
185 .id = UCLASS_MMC,
186 .of_match = snps_dwmmc_ids,
Simon Glassd1998a92020-12-03 16:55:21 -0700187 .of_to_plat = snps_dwmmc_of_to_plat,
Eugeniy Paltsev15736e22019-02-25 18:35:28 +0300188 .ops = &snps_dwmci_dm_ops,
189 .bind = snps_dwmmc_bind,
190 .probe = snps_dwmmc_probe,
Simon Glass41575d82020-12-03 16:55:17 -0700191 .priv_auto = sizeof(struct snps_dwmci_priv_data),
Simon Glasscaa4daa2020-12-03 16:55:18 -0700192 .plat_auto = sizeof(struct snps_dwmci_plat),
Eugeniy Paltsev15736e22019-02-25 18:35:28 +0300193};