blob: 9548b961e323427af170a5ebed2d98fbcc09cc52 [file] [log] [blame]
Philipp Tomsich4d02d202017-07-13 01:36:39 +02001CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
3CONFIG_SPL_LIBCOMMON_SUPPORT=y
4CONFIG_SPL_LIBGENERIC_SUPPORT=y
5CONFIG_SYS_MALLOC_F_LEN=0x2000
6CONFIG_ROCKCHIP_RK3368=y
7CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
8CONFIG_TPL_LIBCOMMON_SUPPORT=y
9CONFIG_TPL_LIBGENERIC_SUPPORT=y
10CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
11CONFIG_SPL_SPI_FLASH_SUPPORT=y
12CONFIG_SPL_SPI_SUPPORT=y
13CONFIG_SPL_STACK_R_ADDR=0x600000
14CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion"
15CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368"
16CONFIG_DEBUG_UART=y
Tom Rinidf35f452017-09-08 10:14:49 -040017CONFIG_ANDROID_BOOT_IMAGE=y
Philipp Tomsich4d02d202017-07-13 01:36:39 +020018CONFIG_FIT=y
19CONFIG_FIT_VERBOSE=y
20CONFIG_SPL_LOAD_FIT=y
21CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/lion_rk3368/fit_spl_atf.its"
Philipp Tomsichc254b292017-09-11 22:04:27 +020022CONFIG_BOOTSTAGE=y
23CONFIG_SPL_BOOTSTAGE=y
24CONFIG_BOOTSTAGE_REPORT=y
25CONFIG_BOOTSTAGE_FDT=y
Philipp Tomsich4d02d202017-07-13 01:36:39 +020026# CONFIG_DISPLAY_CPUINFO is not set
27CONFIG_ARCH_EARLY_INIT_R=y
28CONFIG_SPL=y
Philipp Tomsich4d02d202017-07-13 01:36:39 +020029CONFIG_SPL_BOOTROM_SUPPORT=y
30# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
31# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
32CONFIG_TPL_SYS_MALLOC_SIMPLE=y
33CONFIG_SPL_STACK_R=y
34CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
Philipp Tomsichec4bf3d2017-09-13 21:29:43 +020035CONFIG_SPL_ATF=y
Philipp Tomsich4d02d202017-07-13 01:36:39 +020036CONFIG_TPL=y
37CONFIG_TPL_BOOTROM_SUPPORT=y
38CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
Tom Rini88663122017-08-14 19:58:53 -040039CONFIG_CMD_GPIO=y
Philipp Tomsich4d02d202017-07-13 01:36:39 +020040CONFIG_CMD_MMC=y
41CONFIG_CMD_SF=y
Philipp Tomsichc254b292017-09-11 22:04:27 +020042CONFIG_CMD_BOOTSTAGE=y
Philipp Tomsich4d02d202017-07-13 01:36:39 +020043CONFIG_CMD_REGULATOR=y
44CONFIG_CMD_MTDPARTS=y
45CONFIG_SPL_OF_CONTROL=y
46CONFIG_TPL_OF_CONTROL=y
Philipp Tomsichc254b292017-09-11 22:04:27 +020047CONFIG_OF_LIVE=y
Philipp Tomsich4d02d202017-07-13 01:36:39 +020048CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
49CONFIG_TPL_OF_PLATDATA=y
Tom Rini5dc4dfd2017-08-28 07:16:32 -040050CONFIG_ENV_IS_IN_MMC=y
Philipp Tomsich4d02d202017-07-13 01:36:39 +020051CONFIG_NET_RANDOM_ETHADDR=y
52CONFIG_TPL_DM=y
53CONFIG_REGMAP=y
54CONFIG_SPL_REGMAP=y
55CONFIG_TPL_REGMAP=y
56CONFIG_SYSCON=y
57CONFIG_SPL_SYSCON=y
58CONFIG_TPL_SYSCON=y
59CONFIG_CLK=y
60CONFIG_SPL_CLK=y
61CONFIG_TPL_CLK=y
62CONFIG_ROCKCHIP_GPIO=y
63CONFIG_MMC_DW=y
64CONFIG_MMC_DW_ROCKCHIP=y
65CONFIG_SPI_FLASH=y
66CONFIG_SPI_FLASH_MACRONIX=y
67CONFIG_SPI_FLASH_WINBOND=y
68CONFIG_PHY_MICREL=y
Philipp Tomsiched6be4f2017-10-30 14:44:54 +010069CONFIG_PHY_MICREL_KSZ90X1=y
Philipp Tomsich4d02d202017-07-13 01:36:39 +020070CONFIG_DM_ETH=y
71CONFIG_ETH_DESIGNWARE=y
72CONFIG_RGMII=y
73CONFIG_GMAC_ROCKCHIP=y
74CONFIG_PINCTRL=y
75CONFIG_SPL_PINCTRL=y
76CONFIG_PINCTRL_ROCKCHIP_RK3368=y
77CONFIG_DM_PMIC=y
78CONFIG_PMIC_RK8XX=y
79CONFIG_DM_REGULATOR_FIXED=y
80CONFIG_RAM=y
81CONFIG_SPL_RAM=y
82CONFIG_TPL_RAM=y
83CONFIG_DEBUG_UART_BASE=0xFF180000
84CONFIG_DEBUG_UART_CLOCK=24000000
85CONFIG_DEBUG_UART_SHIFT=2
86CONFIG_DEBUG_UART_ANNOUNCE=y
87CONFIG_DEBUG_UART_SKIP_INIT=y
88CONFIG_ROCKCHIP_SPI=y
89CONFIG_SYSRESET=y
Philipp Tomsichfe1c3cd2017-07-28 18:00:27 +020090CONFIG_TIMER=y
91CONFIG_SPL_TIMER=y
92CONFIG_TPL_TIMER=y
93CONFIG_ROCKCHIP_TIMER=y
Philipp Tomsich4d02d202017-07-13 01:36:39 +020094CONFIG_USE_TINY_PRINTF=y
95CONFIG_SPL_TINY_MEMSET=y
96CONFIG_LZO=y
97CONFIG_ERRNO_STR=y
98CONFIG_SMBIOS_MANUFACTURER="rockchip"