blob: 2d5b5dc562e06473ce6d19baeba44c90698b98d1 [file] [log] [blame]
Jason Jinece92f82007-07-06 08:34:56 +08001/****************************************************************************
2*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +02003* Video BOOT Graphics Card POST Module
Jason Jinece92f82007-07-06 08:34:56 +08004*
5* ========================================================================
Kumar Gala4c2e3da2009-07-28 21:49:52 -05006* Copyright (C) 2007 Freescale Semiconductor, Inc.
Jason Jinece92f82007-07-06 08:34:56 +08007* Jason Jin <Jason.jin@freescale.com>
8*
9* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
10*
11* This file may be distributed and/or modified under the terms of the
12* GNU General Public License version 2.0 as published by the Free
13* Software Foundation and appearing in the file LICENSE.GPL included
14* in the packaging of this file.
15*
16* Licensees holding a valid Commercial License for this product from
17* SciTech Software, Inc. may use this file in accordance with the
18* Commercial License Agreement provided with the Software.
19*
20* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
21* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22* PURPOSE.
23*
24* See http://www.scitechsoft.com/license/ for information about
25* the licensing options available and how to purchase a Commercial
26* License Agreement.
27*
28* Contact license@scitechsoft.com if any conditions of this licensing
29* are not clear to you, or you have questions about licensing options.
30*
31* ========================================================================
32*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020033* Language: ANSI C
34* Environment: Linux Kernel
35* Developer: Kendall Bennett
Jason Jinece92f82007-07-06 08:34:56 +080036*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020037* Description: Module to implement booting PCI/AGP controllers on the
38* bus. We use the x86 real mode emulator to run the BIOS on
39* graphics controllers to bring the cards up.
Jason Jinece92f82007-07-06 08:34:56 +080040*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020041* Note that at present this module does *not* support
42* multiple controllers.
Jason Jinece92f82007-07-06 08:34:56 +080043*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020044* The orignal name of this file is warmboot.c.
45* Jason ported this file to u-boot to run the ATI video card
46* BIOS in u-boot.
Jason Jinece92f82007-07-06 08:34:56 +080047****************************************************************************/
48#include <common.h>
Simon Glass4c59f952014-11-14 20:56:40 -070049#include <bios_emul.h>
50#include <errno.h>
Jason Jinece92f82007-07-06 08:34:56 +080051#include <malloc.h>
Simon Glass4c59f952014-11-14 20:56:40 -070052#include <vbe.h>
53#include "biosemui.h"
Jason Jinece92f82007-07-06 08:34:56 +080054
55/* Length of the BIOS image */
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020056#define MAX_BIOSLEN (128 * 1024L)
Jason Jinece92f82007-07-06 08:34:56 +080057
Jason Jinece92f82007-07-06 08:34:56 +080058/* Place to save PCI BAR's that we change and later restore */
59static u32 saveROMBaseAddress;
60static u32 saveBaseAddress10;
61static u32 saveBaseAddress14;
62static u32 saveBaseAddress18;
63static u32 saveBaseAddress20;
64
Simon Glass222f25f2014-12-29 19:32:26 -070065/* Addres im memory of VBE region */
66const int vbe_offset = 0x2000;
67
68static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info,
69 u32 x86_dword_ptr)
Simon Glass4c59f952014-11-14 20:56:40 -070070{
Simon Glass222f25f2014-12-29 19:32:26 -070071 u32 seg_ofs, flat;
72
73 seg_ofs = le32_to_cpu(x86_dword_ptr);
74 flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff);
75 if (flat >= 0xc0000)
76 return vga_info->BIOSImage + flat - 0xc0000;
77 else
78 return buf + (flat - vbe_offset);
79}
80
81static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
82 int vesa_mode, struct vbe_mode_info *mode_info)
83{
84 void *buffer = (void *)(M.mem_base + vbe_offset);
85 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
86 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
87 struct vesa_mode_info *vm;
88 struct vbe_info *info;
89 const u16 *modes_bios, *ptr;
90 u16 *modes;
91 int size;
92
93 debug("VBE: Getting information\n");
94 regs->e.eax = VESA_GET_INFO;
95 regs->e.esi = buffer_seg;
96 regs->e.edi = buffer_adr;
97 info = buffer;
98 memset(info, '\0', sizeof(*info));
99 strcpy(info->signature, "VBE2");
100 BE_int86(0x10, regs, regs);
101 if (regs->e.eax != 0x4f) {
102 debug("VESA_GET_INFO: error %x\n", regs->e.eax);
103 return -ENOSYS;
104 }
105 debug("version %x\n", le16_to_cpu(info->version));
106 debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info,
107 info->oem_string_ptr));
108 debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info,
109 info->vendor_name_ptr));
110 debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info,
111 info->product_name_ptr));
112 debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info,
113 info->product_rev_ptr));
114 modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr);
115 debug("Modes: ");
116 for (ptr = modes_bios; *ptr != 0xffff; ptr++)
117 debug("%x ", le16_to_cpu(*ptr));
118 debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4);
119 size = (ptr - modes_bios) * sizeof(u16) + 2;
120 modes = malloc(size);
121 if (!modes)
122 return -ENOMEM;
123 memcpy(modes, modes_bios, size);
124
125 regs->e.eax = VESA_GET_CUR_MODE;
126 BE_int86(0x10, regs, regs);
127 if (regs->e.eax != 0x4f) {
128 debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax);
129 return -ENOSYS;
130 }
131 debug("Current mode %x\n", regs->e.ebx);
132
133 for (ptr = modes; *ptr != 0xffff; ptr++) {
134 int mode = le16_to_cpu(*ptr);
135 bool linear_ok;
136 int attr;
137
138 break;
139 debug("Mode %x: ", mode);
140 memset(buffer, '\0', sizeof(struct vbe_mode_info));
141 regs->e.eax = VESA_GET_MODE_INFO;
142 regs->e.ebx = 0;
143 regs->e.ecx = mode;
144 regs->e.edx = 0;
145 regs->e.esi = buffer_seg;
146 regs->e.edi = buffer_adr;
147 BE_int86(0x10, regs, regs);
148 if (regs->e.eax != 0x4f) {
149 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
150 continue;
151 }
152 memcpy(mode_info->mode_info_block, buffer,
153 sizeof(struct vesa_mode_info));
154 mode_info->valid = true;
155 vm = &mode_info->vesa;
156 attr = le16_to_cpu(vm->mode_attributes);
157 linear_ok = attr & 0x80;
158 debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n",
159 le16_to_cpu(vm->x_resolution),
160 le16_to_cpu(vm->y_resolution),
161 vm->bits_per_pixel, vm->memory_model,
162 linear_ok ? "OK" : "not available",
163 attr);
164 debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n",
165 vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos,
166 vm->red_mask_size, vm->green_mask_size,
167 vm->blue_mask_size);
168 }
169
170 return 0;
171}
172
173static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
174 struct vbe_mode_info *mode_info)
175{
176 void *buffer = (void *)(M.mem_base + vbe_offset);
177 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
178 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
179 struct vesa_mode_info *vm;
180
Simon Glass4c59f952014-11-14 20:56:40 -0700181 debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
Simon Glass4c59f952014-11-14 20:56:40 -0700182 regs->e.eax = VESA_SET_MODE;
183 regs->e.ebx = vesa_mode;
Simon Glass222f25f2014-12-29 19:32:26 -0700184 /* request linear framebuffer mode and don't clear display */
185 regs->e.ebx |= (1 << 14) | (1 << 15);
Simon Glass4c59f952014-11-14 20:56:40 -0700186 BE_int86(0x10, regs, regs);
Simon Glass222f25f2014-12-29 19:32:26 -0700187 if (regs->e.eax != 0x4f) {
188 debug("VESA_SET_MODE: error %x\n", regs->e.eax);
189 return -ENOSYS;
190 }
Simon Glass4c59f952014-11-14 20:56:40 -0700191
Simon Glass222f25f2014-12-29 19:32:26 -0700192 memset(buffer, '\0', sizeof(struct vbe_mode_info));
193 debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
Simon Glass4c59f952014-11-14 20:56:40 -0700194 regs->e.eax = VESA_GET_MODE_INFO;
Simon Glass4c59f952014-11-14 20:56:40 -0700195 regs->e.ecx = vesa_mode;
Simon Glass4c59f952014-11-14 20:56:40 -0700196 regs->e.esi = buffer_seg;
197 regs->e.edi = buffer_adr;
198 BE_int86(0x10, regs, regs);
Simon Glass222f25f2014-12-29 19:32:26 -0700199 if (regs->e.eax != 0x4f) {
200 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
201 return -ENOSYS;
202 }
Simon Glass4c59f952014-11-14 20:56:40 -0700203
Simon Glass222f25f2014-12-29 19:32:26 -0700204 memcpy(mode_info->mode_info_block, buffer,
205 sizeof(struct vesa_mode_info));
206 mode_info->valid = true;
207 mode_info->video_mode = vesa_mode;
208 vm = &mode_info->vesa;
209 vm->x_resolution = le16_to_cpu(vm->x_resolution);
210 vm->y_resolution = le16_to_cpu(vm->y_resolution);
211 vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline);
212 vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr);
213 vm->mode_attributes = le16_to_cpu(vm->mode_attributes);
214 debug("VBE: Init complete\n");
215
216 return 0;
Simon Glass4c59f952014-11-14 20:56:40 -0700217}
218
Jason Jinece92f82007-07-06 08:34:56 +0800219/****************************************************************************
220PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200221pcidev - PCI device info for the video card on the bus to boot
Simon Glass4c59f952014-11-14 20:56:40 -0700222vga_info - BIOS emulator VGA info structure
Jason Jinece92f82007-07-06 08:34:56 +0800223
224REMARKS:
225This function executes the BIOS POST code on the controller. We assume that
226at this stage the controller has its I/O and memory space enabled and
227that all other controllers are in a disabled state.
228****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700229#ifdef CONFIG_DM_PCI
230static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info,
231 int vesa_mode, struct vbe_mode_info *mode_info)
232#else
Simon Glass4c59f952014-11-14 20:56:40 -0700233static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
234 int vesa_mode, struct vbe_mode_info *mode_info)
Simon Glass72826722016-01-17 16:11:09 -0700235#endif
Jason Jinece92f82007-07-06 08:34:56 +0800236{
237 RMREGS regs;
238 RMSREGS sregs;
Simon Glass72826722016-01-17 16:11:09 -0700239#ifdef CONFIG_DM_PCI
240 pci_dev_t bdf;
241#endif
Jason Jinece92f82007-07-06 08:34:56 +0800242
243 /* Determine the value to store in AX for BIOS POST. Per the PCI specs,
244 AH must contain the bus and AL must contain the devfn, encoded as
245 (dev << 3) | fn
246 */
247 memset(&regs, 0, sizeof(regs));
248 memset(&sregs, 0, sizeof(sregs));
Simon Glass72826722016-01-17 16:11:09 -0700249#ifdef CONFIG_DM_PCI
250 bdf = dm_pci_get_bdf(pcidev);
251 regs.x.ax = (int)PCI_BUS(bdf) << 8 |
252 (int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf);
253#else
Jason Jinece92f82007-07-06 08:34:56 +0800254 regs.x.ax = ((int)PCI_BUS(pcidev) << 8) |
255 ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev);
Simon Glass72826722016-01-17 16:11:09 -0700256#endif
Jason Jinece92f82007-07-06 08:34:56 +0800257 /*Setup the X86 emulator for the VGA BIOS*/
Simon Glass4c59f952014-11-14 20:56:40 -0700258 BE_setVGA(vga_info);
Jason Jinece92f82007-07-06 08:34:56 +0800259
260 /*Execute the BIOS POST code*/
261 BE_callRealMode(0xC000, 0x0003, &regs, &sregs);
262
263 /*Cleanup and exit*/
Simon Glass4c59f952014-11-14 20:56:40 -0700264 BE_getVGA(vga_info);
265
Simon Glass222f25f2014-12-29 19:32:26 -0700266 /* Useful for debugging */
267 if (0)
268 atibios_debug_mode(vga_info, &regs, vesa_mode, mode_info);
Simon Glass4c59f952014-11-14 20:56:40 -0700269 if (vesa_mode != -1)
270 atibios_set_vesa_mode(&regs, vesa_mode, mode_info);
Jason Jinece92f82007-07-06 08:34:56 +0800271}
272
273/****************************************************************************
274PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200275pcidev - PCI device info for the video card on the bus
276bar - Place to return the base address register offset to use
Jason Jinece92f82007-07-06 08:34:56 +0800277
278RETURNS:
279The address to use to map the secondary BIOS (AGP devices)
280
281REMARKS:
282Searches all the PCI base address registers for the device looking for a
283memory mapping that is large enough to hold our ROM BIOS. We usually end up
284finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
285to map the BIOS for the device into. We use a mapping that is already
286assigned to the device to ensure the memory range will be passed through
287by any PCI->PCI or AGP->PCI bridge that may be present.
288
289NOTE: Usually this function is only used for AGP devices, but it may be
290 used for PCI devices that have already been POST'ed and the BIOS
291 ROM base address has been zero'ed out.
292
293NOTE: This function leaves the original memory aperture disabled by leaving
294 it programmed to all 1's. It must be restored to the correct value
295 later.
296****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700297#ifdef CONFIG_DM_PCI
298static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar)
299#else
Jason Jinece92f82007-07-06 08:34:56 +0800300static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar)
Simon Glass72826722016-01-17 16:11:09 -0700301#endif
Jason Jinece92f82007-07-06 08:34:56 +0800302{
303 u32 base, size;
304
305 for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
Simon Glass72826722016-01-17 16:11:09 -0700306#ifdef CONFIG_DM_PCI
307 dm_pci_read_config32(pcidev, *bar, &base);
308#else
Jason Jinece92f82007-07-06 08:34:56 +0800309 pci_read_config_dword(pcidev, *bar, &base);
Simon Glass72826722016-01-17 16:11:09 -0700310#endif
Jason Jinece92f82007-07-06 08:34:56 +0800311 if (!(base & 0x1)) {
Simon Glass72826722016-01-17 16:11:09 -0700312#ifdef CONFIG_DM_PCI
313 dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF);
314 dm_pci_read_config32(pcidev, *bar, &size);
315#else
Jason Jinece92f82007-07-06 08:34:56 +0800316 pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF);
317 pci_read_config_dword(pcidev, *bar, &size);
Simon Glass72826722016-01-17 16:11:09 -0700318#endif
Jason Jinece92f82007-07-06 08:34:56 +0800319 size = ~(size & ~0xFF) + 1;
320 if (size >= MAX_BIOSLEN)
321 return base & ~0xFF;
322 }
323 }
324 return 0;
325}
326
327/****************************************************************************
328REMARKS:
329Some non-x86 Linux kernels map PCI relocateable I/O to values that
330are above 64K, which will not work with the BIOS image that requires
331the offset for the I/O ports to be a maximum of 16-bits. Ideally
332someone should fix the kernel to map the I/O ports for VGA compatible
333devices to a different location (or just all I/O ports since it is
334unlikely you can have enough devices in the machine to use up all
33564K of the I/O space - a total of more than 256 cards would be
336necessary).
337
338Anyway to fix this we change all I/O mapped base registers and
339chop off the top bits.
340****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700341#ifdef CONFIG_DM_PCI
342static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base)
343#else
Jason Jinece92f82007-07-06 08:34:56 +0800344static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
Simon Glass72826722016-01-17 16:11:09 -0700345#endif
Jason Jinece92f82007-07-06 08:34:56 +0800346{
347 if ((*base & 0x1) && (*base > 0xFFFE)) {
348 *base &= 0xFFFF;
Simon Glass72826722016-01-17 16:11:09 -0700349#ifdef CONFIG_DM_PCI
350 dm_pci_write_config32(pcidev, reg, *base);
351#else
Jason Jinece92f82007-07-06 08:34:56 +0800352 pci_write_config_dword(pcidev, reg, *base);
Simon Glass72826722016-01-17 16:11:09 -0700353#endif
Jason Jinece92f82007-07-06 08:34:56 +0800354
355 }
356}
357
358/****************************************************************************
359PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200360pcidev - PCI device info for the video card on the bus
Jason Jinece92f82007-07-06 08:34:56 +0800361
362RETURNS:
363Pointers to the mapped BIOS image
364
365REMARKS:
366Maps a pointer to the BIOS image on the graphics card on the PCI bus.
367****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700368#ifdef CONFIG_DM_PCI
369void *PCI_mapBIOSImage(struct udevice *pcidev)
370#else
Jason Jinece92f82007-07-06 08:34:56 +0800371void *PCI_mapBIOSImage(pci_dev_t pcidev)
Simon Glass72826722016-01-17 16:11:09 -0700372#endif
Jason Jinece92f82007-07-06 08:34:56 +0800373{
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500374 u32 BIOSImageBus;
Jason Jinece92f82007-07-06 08:34:56 +0800375 int BIOSImageBAR;
376 u8 *BIOSImage;
377
378 /*Save PCI BAR registers that might get changed*/
Simon Glass72826722016-01-17 16:11:09 -0700379#ifdef CONFIG_DM_PCI
380 dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
381 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
382 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
383 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
384 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
385#else
Jason Jinece92f82007-07-06 08:34:56 +0800386 pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
387 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
388 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
389 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
390 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
Simon Glass72826722016-01-17 16:11:09 -0700391#endif
Jason Jinece92f82007-07-06 08:34:56 +0800392
393 /*Fix up I/O base registers to less than 64K */
394 if(saveBaseAddress14 != 0)
395 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
396 else
397 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
398
399 /* Some cards have problems that stop us from being able to read the
400 BIOS image from the ROM BAR. To fix this we have to do some chipset
401 specific programming for different cards to solve this problem.
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200402 */
Jason Jinece92f82007-07-06 08:34:56 +0800403
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500404 BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
405 if (BIOSImageBus == 0) {
Jason Jinece92f82007-07-06 08:34:56 +0800406 printf("Find bios addr error\n");
407 return NULL;
408 }
409
Simon Glass72826722016-01-17 16:11:09 -0700410#ifdef CONFIG_DM_PCI
411 BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus,
412 PCI_REGION_MEM, 0, MAP_NOCACHE);
413
414 /*Change the PCI BAR registers to map it onto the bus.*/
415 dm_pci_write_config32(pcidev, BIOSImageBAR, 0);
416 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
417#else
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500418 BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
419 PCI_REGION_MEM, 0, MAP_NOCACHE);
Jason Jinece92f82007-07-06 08:34:56 +0800420
421 /*Change the PCI BAR registers to map it onto the bus.*/
422 pci_write_config_dword(pcidev, BIOSImageBAR, 0);
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500423 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
Simon Glass72826722016-01-17 16:11:09 -0700424#endif
Jason Jinece92f82007-07-06 08:34:56 +0800425 udelay(1);
426
427 /*Check that the BIOS image is valid. If not fail, or return the
428 compiled in BIOS image if that option was enabled
429 */
430 if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) {
431 return NULL;
432 }
433
434 return BIOSImage;
435}
436
437/****************************************************************************
438PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200439pcidev - PCI device info for the video card on the bus
Jason Jinece92f82007-07-06 08:34:56 +0800440
441REMARKS:
442Unmaps the BIOS image for the device and restores framebuffer mappings
443****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700444#ifdef CONFIG_DM_PCI
445void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
446{
447 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
448 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
449 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
450 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
451 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
452}
453#else
Jason Jinece92f82007-07-06 08:34:56 +0800454void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
455{
456 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
457 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
458 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
459 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
460 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
461}
Simon Glass72826722016-01-17 16:11:09 -0700462#endif
Jason Jinece92f82007-07-06 08:34:56 +0800463
464/****************************************************************************
465PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200466pcidev - PCI device info for the video card on the bus to boot
Jason Jinece92f82007-07-06 08:34:56 +0800467VGAInfo - BIOS emulator VGA info structure
468
469RETURNS:
York Sun472d5462013-04-01 11:29:11 -0700470true if successfully initialised, false if not.
Jason Jinece92f82007-07-06 08:34:56 +0800471
472REMARKS:
473Loads and POST's the display controllers BIOS, directly from the BIOS
474image we can extract over the PCI bus.
475****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700476#ifdef CONFIG_DM_PCI
477static int PCI_postController(struct udevice *pcidev, uchar *bios_rom,
478 int bios_len, BE_VGAInfo *vga_info,
479 int vesa_mode, struct vbe_mode_info *mode_info)
480#else
Simon Glass4c59f952014-11-14 20:56:40 -0700481static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
482 BE_VGAInfo *vga_info, int vesa_mode,
483 struct vbe_mode_info *mode_info)
Simon Glass72826722016-01-17 16:11:09 -0700484#endif
Jason Jinece92f82007-07-06 08:34:56 +0800485{
Simon Glass4c59f952014-11-14 20:56:40 -0700486 u32 bios_image_len;
487 uchar *mapped_bios;
488 uchar *copy_of_bios;
Simon Glass72826722016-01-17 16:11:09 -0700489#ifdef CONFIG_DM_PCI
490 pci_dev_t bdf;
491#endif
Jason Jinece92f82007-07-06 08:34:56 +0800492
Simon Glass4c59f952014-11-14 20:56:40 -0700493 if (bios_rom) {
494 copy_of_bios = bios_rom;
495 bios_image_len = bios_len;
496 } else {
497 /*
498 * Allocate memory to store copy of BIOS from display
499 * controller
500 */
501 mapped_bios = PCI_mapBIOSImage(pcidev);
502 if (mapped_bios == NULL) {
503 printf("videoboot: Video ROM failed to map!\n");
504 return false;
505 }
506
507 bios_image_len = mapped_bios[2] * 512;
508
509 copy_of_bios = malloc(bios_image_len);
510 if (copy_of_bios == NULL) {
511 printf("videoboot: Out of memory!\n");
512 return false;
513 }
514 memcpy(copy_of_bios, mapped_bios, bios_image_len);
515 PCI_unmapBIOSImage(pcidev, mapped_bios);
Jason Jinece92f82007-07-06 08:34:56 +0800516 }
517
Simon Glass4c59f952014-11-14 20:56:40 -0700518 /*Save information in vga_info structure*/
Simon Glass72826722016-01-17 16:11:09 -0700519#ifdef CONFIG_DM_PCI
520 bdf = dm_pci_get_bdf(pcidev);
521 vga_info->function = PCI_FUNC(bdf);
522 vga_info->device = PCI_DEV(bdf);
523 vga_info->bus = PCI_BUS(bdf);
524#else
Simon Glass4c59f952014-11-14 20:56:40 -0700525 vga_info->function = PCI_FUNC(pcidev);
526 vga_info->device = PCI_DEV(pcidev);
527 vga_info->bus = PCI_BUS(pcidev);
Simon Glass72826722016-01-17 16:11:09 -0700528#endif
Simon Glass4c59f952014-11-14 20:56:40 -0700529 vga_info->pcidev = pcidev;
530 vga_info->BIOSImage = copy_of_bios;
531 vga_info->BIOSImageLen = bios_image_len;
Jason Jinece92f82007-07-06 08:34:56 +0800532
533 /*Now execute the BIOS POST for the device*/
Simon Glass4c59f952014-11-14 20:56:40 -0700534 if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) {
Jason Jinece92f82007-07-06 08:34:56 +0800535 printf("videoboot: Video ROM image is invalid!\n");
536 return false;
537 }
538
Simon Glass4c59f952014-11-14 20:56:40 -0700539 PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);
Jason Jinece92f82007-07-06 08:34:56 +0800540
541 /*Reset the size of the BIOS image to the final size*/
Simon Glass4c59f952014-11-14 20:56:40 -0700542 vga_info->BIOSImageLen = copy_of_bios[2] * 512;
Jason Jinece92f82007-07-06 08:34:56 +0800543 return true;
544}
545
Simon Glass72826722016-01-17 16:11:09 -0700546#ifdef CONFIG_DM_PCI
547int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop)
548#else
Simon Glass4c59f952014-11-14 20:56:40 -0700549int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop)
Simon Glass72826722016-01-17 16:11:09 -0700550#endif
Simon Glass4c59f952014-11-14 20:56:40 -0700551{
552 BE_VGAInfo *VGAInfo;
Simon Glass72826722016-01-17 16:11:09 -0700553#ifdef CONFIG_DM_PCI
554 pci_dev_t bdf = dm_pci_get_bdf(pcidev);
Simon Glass4c59f952014-11-14 20:56:40 -0700555
556 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
Simon Glass72826722016-01-17 16:11:09 -0700557 PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf));
558#else
559 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
560 PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev));
561#endif
Simon Glass4c59f952014-11-14 20:56:40 -0700562 /*Initialise the x86 BIOS emulator*/
563 if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
564 printf("videoboot: Out of memory!\n");
565 return -ENOMEM;
566 }
567 memset(VGAInfo, 0, sizeof(*VGAInfo));
568 BE_init(0, 65536, VGAInfo, 0);
569 *vga_infop = VGAInfo;
570
571 return 0;
572}
573
574void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
575{
576 X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
577}
578
Simon Glass72826722016-01-17 16:11:09 -0700579#ifdef CONFIG_DM_PCI
580int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len,
581 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
582 struct vbe_mode_info *mode_info)
583#else
Simon Glass4c59f952014-11-14 20:56:40 -0700584int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
585 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
586 struct vbe_mode_info *mode_info)
Simon Glass72826722016-01-17 16:11:09 -0700587#endif
Simon Glass4c59f952014-11-14 20:56:40 -0700588{
589 /*Post all the display controller BIOS'es*/
590 if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
591 vesa_mode, mode_info))
592 return -EINVAL;
593
594 /*
595 * Cleanup and exit the emulator if requested. If the BIOS emulator
596 * is needed after booting the card, we will not call BE_exit and
597 * leave it enabled for further use (ie: VESA driver etc).
598 */
599 if (clean_up) {
600 BE_exit();
Bin Meng6e7b5f22015-04-24 15:48:05 +0800601 if (vga_info->BIOSImage &&
Simon Glass2cd11a22016-09-25 21:33:06 -0600602 (ulong)(vga_info->BIOSImage) != 0xc0000)
Simon Glass4c59f952014-11-14 20:56:40 -0700603 free(vga_info->BIOSImage);
604 free(vga_info);
605 vga_info = NULL;
606 }
607
608 return 0;
609}
610
Jason Jinece92f82007-07-06 08:34:56 +0800611/****************************************************************************
612PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200613pcidev - PCI device info for the video card on the bus to boot
Jason Jinece92f82007-07-06 08:34:56 +0800614pVGAInfo - Place to return VGA info structure is requested
York Sun472d5462013-04-01 11:29:11 -0700615cleanUp - true to clean up on exit, false to leave emulator active
Jason Jinece92f82007-07-06 08:34:56 +0800616
617REMARKS:
618Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
619and the X86 BIOS emulator module.
620****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700621#ifdef CONFIG_DM_PCI
622int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,
623 int clean_up)
624#else
Simon Glass4c59f952014-11-14 20:56:40 -0700625int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up)
Simon Glass72826722016-01-17 16:11:09 -0700626#endif
Jason Jinece92f82007-07-06 08:34:56 +0800627{
628 BE_VGAInfo *VGAInfo;
Simon Glass4c59f952014-11-14 20:56:40 -0700629 int ret;
Jason Jinece92f82007-07-06 08:34:56 +0800630
Simon Glass4c59f952014-11-14 20:56:40 -0700631 ret = biosemu_setup(pcidev, &VGAInfo);
632 if (ret)
Jason Jinece92f82007-07-06 08:34:56 +0800633 return false;
Simon Glass4c59f952014-11-14 20:56:40 -0700634 ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
635 if (ret)
Ed Swarthout9624f6d2010-03-31 09:54:28 -0500636 return false;
Jason Jinece92f82007-07-06 08:34:56 +0800637
Simon Glass4c59f952014-11-14 20:56:40 -0700638 /* Return VGA info pointer if the caller requested it*/
Jason Jinece92f82007-07-06 08:34:56 +0800639 if (pVGAInfo)
640 *pVGAInfo = VGAInfo;
Simon Glass4c59f952014-11-14 20:56:40 -0700641
Jason Jinece92f82007-07-06 08:34:56 +0800642 return true;
643}