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Wenyou Yang9e5935c2016-07-20 17:55:12 +08001/*
2 * Copyright (C) 2016 Atmel Corporation
3 * Wenyou.Yang <wenyou.yang@atmel.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9#include <clk-uclass.h>
Simon Glass9d922452017-05-17 17:18:03 -060010#include <dm.h>
Wenyou Yang9e5935c2016-07-20 17:55:12 +080011
12DECLARE_GLOBAL_DATA_PTR;
13
14static ulong at91_master_clk_get_rate(struct clk *clk)
15{
16 return gd->arch.mck_rate_hz;
17}
18
19static struct clk_ops at91_master_clk_ops = {
20 .get_rate = at91_master_clk_get_rate,
21};
22
23static const struct udevice_id at91_master_clk_match[] = {
Wenyou Yanga9513d42017-04-14 14:53:23 +080024 { .compatible = "atmel,at91rm9200-clk-master" },
Wenyou Yang9e5935c2016-07-20 17:55:12 +080025 { .compatible = "atmel,at91sam9x5-clk-master" },
26 {}
27};
28
29U_BOOT_DRIVER(at91_master_clk) = {
30 .name = "at91-master-clk",
31 .id = UCLASS_CLK,
32 .of_match = at91_master_clk_match,
33 .ops = &at91_master_clk_ops,
34};