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Wenyou Yang9e5935c2016-07-20 17:55:12 +08001/*
2 * Copyright (C) 2016 Atmel Corporation
3 * Wenyou.Yang <wenyou.yang@atmel.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9#include <clk-uclass.h>
Simon Glass9d922452017-05-17 17:18:03 -060010#include <dm.h>
Wenyou Yang9e5935c2016-07-20 17:55:12 +080011#include <dm/lists.h>
Heiko Stübner27326c72017-02-18 19:46:21 +010012#include <dm/util.h>
Wenyou Yang9e5935c2016-07-20 17:55:12 +080013#include "pmc.h"
14
15DECLARE_GLOBAL_DATA_PTR;
16
Wenyou Yang9e5935c2016-07-20 17:55:12 +080017static const struct udevice_id at91_pmc_match[] = {
Wenyou Yang3fea8092017-04-14 14:53:24 +080018 { .compatible = "atmel,at91rm9200-pmc" },
19 { .compatible = "atmel,at91sam9260-pmc" },
20 { .compatible = "atmel,at91sam9g45-pmc" },
21 { .compatible = "atmel,at91sam9n12-pmc" },
22 { .compatible = "atmel,at91sam9x5-pmc" },
23 { .compatible = "atmel,sama5d3-pmc" },
Wenyou Yang9e5935c2016-07-20 17:55:12 +080024 { .compatible = "atmel,sama5d2-pmc" },
25 {}
26};
27
28U_BOOT_DRIVER(at91_pmc) = {
Wenyou Yangb892b052016-09-13 10:25:55 +080029 .name = "at91-pmc",
30 .id = UCLASS_SIMPLE_BUS,
Wenyou Yang9e5935c2016-07-20 17:55:12 +080031 .of_match = at91_pmc_match,
Wenyou Yang9e5935c2016-07-20 17:55:12 +080032};
33
Wenyou Yang6cadaa02016-09-27 11:00:29 +080034/*---------------------------------------------------------*/
35
Wenyou Yang9e5935c2016-07-20 17:55:12 +080036int at91_pmc_core_probe(struct udevice *dev)
37{
38 struct pmc_platdata *plat = dev_get_platdata(dev);
39
40 dev = dev_get_parent(dev);
41
Simon Glassa821c4a2017-05-17 17:18:05 -060042 plat->reg_base = (struct at91_pmc *)devfdt_get_addr_ptr(dev);
Wenyou Yang9e5935c2016-07-20 17:55:12 +080043
44 return 0;
45}
46
Wenyou Yang6cadaa02016-09-27 11:00:29 +080047/**
48 * at91_clk_sub_device_bind() - for the at91 clock driver
49 * Recursively bind its children as clk devices.
50 *
51 * @return: 0 on success, or negative error code on failure
52 */
53int at91_clk_sub_device_bind(struct udevice *dev, const char *drv_name)
Wenyou Yang9e5935c2016-07-20 17:55:12 +080054{
55 const void *fdt = gd->fdt_blob;
Simon Glasse160f7d2017-01-17 16:52:55 -070056 int offset = dev_of_offset(dev);
Wenyou Yang6cadaa02016-09-27 11:00:29 +080057 bool pre_reloc_only = !(gd->flags & GD_FLG_RELOC);
Wenyou Yang9e5935c2016-07-20 17:55:12 +080058 const char *name;
59 int ret;
60
61 for (offset = fdt_first_subnode(fdt, offset);
62 offset > 0;
63 offset = fdt_next_subnode(fdt, offset)) {
Wenyou Yang6cadaa02016-09-27 11:00:29 +080064 if (pre_reloc_only &&
Heiko Stübner27326c72017-02-18 19:46:21 +010065 !dm_fdt_pre_reloc(fdt, offset))
Wenyou Yang6cadaa02016-09-27 11:00:29 +080066 continue;
67 /*
68 * If this node has "compatible" property, this is not
69 * a clock sub-node, but a normal device. skip.
70 */
71 fdt_get_property(fdt, offset, "compatible", &ret);
72 if (ret >= 0)
73 continue;
74
75 if (ret != -FDT_ERR_NOTFOUND)
76 return ret;
77
Wenyou Yang9e5935c2016-07-20 17:55:12 +080078 name = fdt_get_name(fdt, offset, NULL);
79 if (!name)
80 return -EINVAL;
Wenyou Yang6cadaa02016-09-27 11:00:29 +080081 ret = device_bind_driver_to_node(dev, drv_name, name,
Simon Glass45a26862017-05-18 20:09:07 -060082 offset_to_ofnode(offset), NULL);
Wenyou Yang9e5935c2016-07-20 17:55:12 +080083 if (ret)
84 return ret;
85 }
86
87 return 0;
88}
89
Simon Glassa4e0ef52017-05-18 20:09:40 -060090int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
Wenyou Yang6cadaa02016-09-27 11:00:29 +080091{
92 int periph;
93
94 if (args->args_count) {
95 debug("Invalid args_count: %d\n", args->args_count);
96 return -EINVAL;
97 }
98
Simon Glasse160f7d2017-01-17 16:52:55 -070099 periph = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(clk->dev), "reg",
100 -1);
Wenyou Yang6cadaa02016-09-27 11:00:29 +0800101 if (periph < 0)
102 return -EINVAL;
103
104 clk->id = periph;
105
106 return 0;
107}
108
109int at91_clk_probe(struct udevice *dev)
110{
111 struct udevice *dev_periph_container, *dev_pmc;
112 struct pmc_platdata *plat = dev_get_platdata(dev);
113
114 dev_periph_container = dev_get_parent(dev);
115 dev_pmc = dev_get_parent(dev_periph_container);
116
Simon Glassa821c4a2017-05-17 17:18:05 -0600117 plat->reg_base = (struct at91_pmc *)devfdt_get_addr_ptr(dev_pmc);
Wenyou Yang6cadaa02016-09-27 11:00:29 +0800118
119 return 0;
120}