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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Fabio Estevam7891e252012-09-13 03:18:20 +00002/*
3 * Copyright (C) 2012 Freescale Semiconductor, Inc.
4 *
5 * Configuration settings for the Freescale i.MX6Q SabreSD board.
Fabio Estevam7891e252012-09-13 03:18:20 +00006 */
7
Fabio Estevam258f76f2017-06-01 12:59:52 -03008#ifndef __MX6SABRESD_CONFIG_H
9#define __MX6SABRESD_CONFIG_H
Fabio Estevam7891e252012-09-13 03:18:20 +000010
John Tobias15582002014-11-12 14:27:44 -080011#ifdef CONFIG_SPL
John Tobias15582002014-11-12 14:27:44 -080012#include "imx6_spl.h"
13#endif
14
Fabio Estevam7891e252012-09-13 03:18:20 +000015#define CONFIG_MACH_TYPE 3980
Fabio Estevambcfc7112012-09-24 08:09:32 +000016#define CONFIG_MXC_UART_BASE UART1_BASE
Simon Glass12ca05a2016-10-17 20:12:39 -060017#define CONSOLE_DEV "ttymxc0"
Fabio Estevam7891e252012-09-13 03:18:20 +000018
Pierre Aubertc1747972013-06-04 09:00:15 +020019#include "mx6sabre_common.h"
Otavio Salvador51535d92012-09-26 11:37:01 +000020
Diego Dortad96796c2016-10-11 11:09:27 -030021/* Falcon Mode */
Tom Rinidec30302017-01-20 19:55:53 -050022#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
23#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
Diego Dortad96796c2016-10-11 11:09:27 -030024#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
Diego Dortad96796c2016-10-11 11:09:27 -030025
26/* Falcon Mode - MMC support: args@1MB kernel@2MB */
27#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
28#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
29#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
30
Shawn Guode7d02a2012-12-30 14:14:59 +000031#define CONFIG_SYS_FSL_USDHC_NUM 3
Shawn Guode7d02a2012-12-30 14:14:59 +000032
Marek Vasute919aa22014-03-23 22:45:41 +010033#ifdef CONFIG_CMD_PCI
Marek Vasute919aa22014-03-23 22:45:41 +010034#define CONFIG_PCI_SCAN_SHOW
35#define CONFIG_PCIE_IMX
36#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
37#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
38#endif
39
Fabio Estevam66ca09f2014-05-09 13:15:42 -030040/* I2C Configs */
Fabio Estevam66ca09f2014-05-09 13:15:42 -030041#define CONFIG_SYS_I2C
42#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020043#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
44#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -070045#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Fabio Estevam66ca09f2014-05-09 13:15:42 -030046#define CONFIG_SYS_I2C_SPEED 100000
47
48/* PMIC */
49#define CONFIG_POWER
50#define CONFIG_POWER_I2C
51#define CONFIG_POWER_PFUZE100
52#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
53
Peng Fan5a3d63c2014-12-02 09:55:27 +080054/* USB Configs */
Peng Fan5a3d63c2014-12-02 09:55:27 +080055#ifdef CONFIG_CMD_USB
Peng Fan5a3d63c2014-12-02 09:55:27 +080056#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
Peng Fan5a3d63c2014-12-02 09:55:27 +080057#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
58#define CONFIG_MXC_USB_FLAGS 0
59#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
60#endif
61
Fabio Estevam258f76f2017-06-01 12:59:52 -030062#endif /* __MX6SABRESD_CONFIG_H */