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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Vlad Lungu0764c162008-01-16 19:27:51 +02002/*
3 * (C) Copyright 2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Vlad Lungu0764c162008-01-16 19:27:51 +02005 */
6
7/*
Shinya Kuribayashi8875e3a2008-04-23 11:02:12 +09008 * This file contains the configuration parameters for qemu-mips target.
Vlad Lungu0764c162008-01-16 19:27:51 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Daniel Schwierzeck6b2eba12012-10-16 15:02:08 +020014#define CONFIG_QEMU_MIPS
Daniel Schwierzeckbdb53cf2014-11-15 23:30:01 +010015
Shinya Kuribayashi8875e3a2008-04-23 11:02:12 +090016#define CONFIG_TIMESTAMP /* Print image info with timestamp */
Vlad Lungu0764c162008-01-16 19:27:51 +020017
Shinya Kuribayashi8875e3a2008-04-23 11:02:12 +090018#define CONFIG_EXTRA_ENV_SETTINGS \
Vlad Lungu0764c162008-01-16 19:27:51 +020019 "addmisc=setenv bootargs ${bootargs} " \
20 "console=ttyS0,${baudrate} " \
21 "panic=1\0" \
22 "bootfile=/tftpboot/vmlinux\0" \
23 "load=tftp 80500000 ${u-boot}\0" \
24 ""
25
26#define CONFIG_BOOTCOMMAND "bootp;bootelf"
27
Vlad Lungu0764c162008-01-16 19:27:51 +020028/*
29 * BOOTP options
30 */
31#define CONFIG_BOOTP_BOOTFILESIZE
Vlad Lungu0764c162008-01-16 19:27:51 +020032
Vlad Lungu0764c162008-01-16 19:27:51 +020033#define CONFIG_DRIVER_NE2000
Daniel Schwierzeck6b2eba12012-10-16 15:02:08 +020034#define CONFIG_DRIVER_NE2000_BASE 0xb4000300
Vlad Lungu0764c162008-01-16 19:27:51 +020035
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020036#define CONFIG_SYS_NS16550_SERIAL
37#define CONFIG_SYS_NS16550_REG_SIZE 1
38#define CONFIG_SYS_NS16550_CLK 115200
Daniel Schwierzeck6b2eba12012-10-16 15:02:08 +020039#define CONFIG_SYS_NS16550_COM1 0xb40003f8
Vlad Lungu0764c162008-01-16 19:27:51 +020040
Stanislav Galabov713a9e12016-02-17 15:23:30 +020041#ifdef CONFIG_SYS_BIG_ENDIAN
42#define CONFIG_IDE_SWAP_IO
43#endif
44
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020045#define CONFIG_SYS_IDE_MAXBUS 2
Daniel Schwierzeck6b2eba12012-10-16 15:02:08 +020046#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
47#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
48#define CONFIG_SYS_ATA_DATA_OFFSET 0
49#define CONFIG_SYS_ATA_REG_OFFSET 0
50#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
Vlad Lungu0764c162008-01-16 19:27:51 +020051
Daniel Schwierzeck6b2eba12012-10-16 15:02:08 +020052#define CONFIG_SYS_IDE_MAXDEVICE 4
Vlad Lungu0764c162008-01-16 19:27:51 +020053
54/*
55 * Miscellaneous configurable options
56 */
Jean-Christophe PLAGNIOL-VILLARDbed8ce82007-12-22 15:03:12 +010057
Kyle Edwards19672282017-04-12 22:42:32 -040058#define CONFIG_SYS_MALLOC_LEN (256 << 10)
Vlad Lungu0764c162008-01-16 19:27:51 +020059
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
Vlad Lungu0764c162008-01-16 19:27:51 +020061
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020062#define CONFIG_SYS_MHZ 132
Vlad Lungu0764c162008-01-16 19:27:51 +020063
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
Shinya Kuribayashia55d4812008-06-05 22:29:00 +090065
Daniel Schwierzeck6b2eba12012-10-16 15:02:08 +020066/* Cached addr */
67#define CONFIG_SYS_SDRAM_BASE 0x80000000
Vlad Lungu0764c162008-01-16 19:27:51 +020068
Daniel Schwierzeck6b2eba12012-10-16 15:02:08 +020069/* default load address */
70#define CONFIG_SYS_LOAD_ADDR 0x81000000
Vlad Lungu0764c162008-01-16 19:27:51 +020071
Vlad Lungu0764c162008-01-16 19:27:51 +020072/*-----------------------------------------------------------------------
73 * FLASH and environment organization
74 */
Vlad Lungu0764c162008-01-16 19:27:51 +020075/* The following #defines are needed to get flash environment right */
Wolfgang Denk14d0a022010-10-07 21:51:12 +020076#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Vlad Lungu0764c162008-01-16 19:27:51 +020077
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
Vlad Lungu0764c162008-01-16 19:27:51 +020079
80/* We boot from this flash, selected with dip switch */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020081#define CONFIG_SYS_FLASH_BASE 0xbfc00000
82#define CONFIG_SYS_MAX_FLASH_BANKS 1
83#define CONFIG_SYS_MAX_FLASH_SECT 128
Vlad Lungu0764c162008-01-16 19:27:51 +020084
Shinya Kuribayashi8875e3a2008-04-23 11:02:12 +090085/* Address and size of Primary Environment Sector */
Jean-Christophe PLAGNIOL-VILLARDb4aff1f2008-04-23 00:11:47 +090086
Shinya Kuribayashi8875e3a2008-04-23 11:02:12 +090087#define MEM_SIZE 128
Vlad Lungu0764c162008-01-16 19:27:51 +020088
Shinya Kuribayashi8875e3a2008-04-23 11:02:12 +090089#endif /* __CONFIG_H */