Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2010-2012 |
| 4 | * NVIDIA Corporation <www.nvidia.com> |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef _TEGRA30_COMMON_H_ |
| 8 | #define _TEGRA30_COMMON_H_ |
| 9 | #include "tegra-common.h" |
| 10 | |
| 11 | /* |
| 12 | * NS16550 Configuration |
| 13 | */ |
| 14 | #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ |
| 15 | |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 16 | /* |
| 17 | * Miscellaneous configurable options |
| 18 | */ |
Jonathan Hunter | f16e311 | 2019-02-12 16:03:14 +0000 | [diff] [blame] | 19 | #define CONFIG_STACKBASE 0x83800000 /* 56MB */ |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 20 | |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 21 | /* |
| 22 | * Memory layout for where various images get loaded by boot scripts: |
| 23 | * |
| 24 | * scriptaddr can be pretty much anywhere that doesn't conflict with something |
| 25 | * else. Put it above BOOTMAPSZ to eliminate conflicts. |
| 26 | * |
Stephen Warren | f940c72 | 2014-02-05 09:24:59 -0700 | [diff] [blame] | 27 | * pxefile_addr_r can be pretty much anywhere that doesn't conflict with |
| 28 | * something else. Put it above BOOTMAPSZ to eliminate conflicts. |
| 29 | * |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 30 | * kernel_addr_r must be within the first 128M of RAM in order for the |
| 31 | * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will |
| 32 | * decompress itself to 0x8000 after the start of RAM, kernel_addr_r |
| 33 | * should not overlap that area, or the kernel will have to copy itself |
| 34 | * somewhere else before decompression. Similarly, the address of any other |
| 35 | * data passed to the kernel shouldn't overlap the start of RAM. Pushing |
Jonathan Hunter | f16e311 | 2019-02-12 16:03:14 +0000 | [diff] [blame] | 36 | * this up to 32M allows for a sizable kernel to be decompressed below the |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 37 | * compressed load address. |
| 38 | * |
Jonathan Hunter | f16e311 | 2019-02-12 16:03:14 +0000 | [diff] [blame] | 39 | * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for |
| 40 | * the compressed kernel to be up to 32M too. |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 41 | * |
Jonathan Hunter | f16e311 | 2019-02-12 16:03:14 +0000 | [diff] [blame] | 42 | * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 43 | * for the FDT/DTB to be up to 1M, which is hopefully plenty. |
| 44 | */ |
Stephen Warren | 48cfca2 | 2015-04-01 15:40:53 -0600 | [diff] [blame] | 45 | #define CONFIG_LOADADDR 0x81000000 |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 46 | #define MEM_LAYOUT_ENV_SETTINGS \ |
| 47 | "scriptaddr=0x90000000\0" \ |
Stephen Warren | f940c72 | 2014-02-05 09:24:59 -0700 | [diff] [blame] | 48 | "pxefile_addr_r=0x90100000\0" \ |
Stephen Warren | 48cfca2 | 2015-04-01 15:40:53 -0600 | [diff] [blame] | 49 | "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ |
Peter Robinson | 632fb97 | 2020-04-02 00:28:54 +0100 | [diff] [blame] | 50 | "fdtfile=" FDTFILE "\0" \ |
Jonathan Hunter | f16e311 | 2019-02-12 16:03:14 +0000 | [diff] [blame] | 51 | "fdt_addr_r=0x83000000\0" \ |
| 52 | "ramdisk_addr_r=0x83100000\0" |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 53 | |
| 54 | /* Defines for SPL */ |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 55 | #define CONFIG_SYS_SPL_MALLOC_START 0x80090000 |
| 56 | #define CONFIG_SPL_STACK 0x800ffffc |
| 57 | |
Jim Lin | d6cf707 | 2013-06-21 19:05:48 +0800 | [diff] [blame] | 58 | /* For USB EHCI controller */ |
| 59 | #define CONFIG_EHCI_IS_TDI |
Jim Lin | 81d21e9 | 2013-11-06 14:03:44 +0800 | [diff] [blame] | 60 | #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 |
Jim Lin | d6cf707 | 2013-06-21 19:05:48 +0800 | [diff] [blame] | 61 | |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 62 | #endif /* _TEGRA30_COMMON_H_ */ |