blob: 7b53af992d5363380ae94067c18adae69abe31f0 [file] [log] [blame]
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +01001/*
2 * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
3 *
4 * Developed for DENX Software Engineering GmbH
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
26
27#ifdef CONFIG_POST
28
29#include <post.h>
30
31
32#if CONFIG_POST & CFG_POST_DSP
33#include <asm/io.h>
34
35/* This test verifies DSP status bits in FPGA */
36
37DECLARE_GLOBAL_DATA_PTR;
38
39#define DSP_STATUS_REG 0xC4000008
40
41int dsp_post_test(int flags)
42{
43 uint read_value;
44 int ret;
45
46 ret = 0;
47 read_value = in_be32((void *)DSP_STATUS_REG) & 0x3;
48 if (read_value != 0x3) {
49 post_log("\nDSP status read %08X\n", read_value);
50 ret = 1;
51 }
52
53 return ret;
54}
55
56#endif /* CONFIG_POST & CFG_POST_DSP */
57#endif /* CONFIG_POST */
58