| Simon Glass | d1cd045 | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014 Google, Inc |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #ifndef _post_h |
| 8 | #define _post_h |
| 9 | |
| 10 | /* port to use for post codes */ |
| 11 | #define POST_PORT 0x80 |
| 12 | |
| 13 | /* post codes which represent various stages of init */ |
| 14 | #define POST_START 0x1e |
| 15 | #define POST_CAR_START 0x1f |
| Simon Glass | 70a09c6 | 2014-11-12 22:42:10 -0700 | [diff] [blame] | 16 | #define POST_CAR_SIPI 0x20 |
| 17 | #define POST_CAR_MTRR 0x21 |
| 18 | #define POST_CAR_UNCACHEABLE 0x22 |
| 19 | #define POST_CAR_BASE_ADDRESS 0x23 |
| 20 | #define POST_CAR_MASK 0x24 |
| 21 | #define POST_CAR_FILL 0x25 |
| 22 | #define POST_CAR_ROM_CACHE 0x26 |
| 23 | #define POST_CAR_MRC_CACHE 0x27 |
| 24 | #define POST_CAR_CPU_CACHE 0x28 |
| Simon Glass | d1cd045 | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 25 | #define POST_START_STACK 0x29 |
| 26 | #define POST_START_DONE 0x2a |
| Simon Glass | 70a09c6 | 2014-11-12 22:42:10 -0700 | [diff] [blame] | 27 | #define POST_CPU_INIT 0x2b |
| Simon Glass | 8e0df06 | 2014-11-12 22:42:23 -0700 | [diff] [blame] | 28 | #define POST_EARLY_INIT 0x2c |
| 29 | #define POST_CPU_INFO 0x2d |
| Simon Glass | 65dd74a | 2014-11-12 22:42:28 -0700 | [diff] [blame^] | 30 | #define POST_PRE_MRC 0x2e |
| 31 | #define POST_MRC 0x2f |
| 32 | #define POST_DRAM 0x2f |
| 33 | |
| 34 | #define POST_RAM_FAILURE 0xea |
| Simon Glass | d1cd045 | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 35 | |
| 36 | /* Output a post code using al - value must be 0 to 0xff */ |
| 37 | #ifdef __ASSEMBLY__ |
| 38 | #define post_code(value) \ |
| 39 | movb $value, %al; \ |
| 40 | outb %al, $POST_PORT |
| 41 | #else |
| Simon Glass | 70a09c6 | 2014-11-12 22:42:10 -0700 | [diff] [blame] | 42 | #include <asm/io.h> |
| 43 | |
| Simon Glass | d1cd045 | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 44 | static inline void post_code(int code) |
| 45 | { |
| 46 | outb(code, POST_PORT); |
| 47 | } |
| 48 | #endif |
| 49 | |
| 50 | #endif |