| Kever Yang | 28fe4d5 | 2019-03-29 09:09:02 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2019 Rockchip Electronics Co., Ltd |
| 4 | */ |
| 5 | #include <asm/io.h> |
| 6 | #include <asm/arch-rockchip/grf_rk322x.h> |
| 7 | #include <asm/arch-rockchip/hardware.h> |
| 8 | |
| 9 | #ifdef CONFIG_DEBUG_UART_BOARD_INIT |
| 10 | void board_debug_uart_init(void) |
| 11 | { |
| 12 | #define GRF_BASE 0x11000000 |
| 13 | static struct rk322x_grf * const grf = (void *)GRF_BASE; |
| 14 | enum { |
| 15 | GPIO1B2_SHIFT = 4, |
| 16 | GPIO1B2_MASK = 3 << GPIO1B2_SHIFT, |
| 17 | GPIO1B2_GPIO = 0, |
| 18 | GPIO1B2_UART1_SIN, |
| 19 | GPIO1B2_UART21_SIN, |
| 20 | |
| 21 | GPIO1B1_SHIFT = 2, |
| 22 | GPIO1B1_MASK = 3 << GPIO1B1_SHIFT, |
| 23 | GPIO1B1_GPIO = 0, |
| 24 | GPIO1B1_UART1_SOUT, |
| 25 | GPIO1B1_UART21_SOUT, |
| 26 | }; |
| 27 | enum { |
| 28 | CON_IOMUX_UART2SEL_SHIFT = 8, |
| 29 | CON_IOMUX_UART2SEL_MASK = 1 << CON_IOMUX_UART2SEL_SHIFT, |
| 30 | CON_IOMUX_UART2SEL_2 = 0, |
| 31 | CON_IOMUX_UART2SEL_21, |
| 32 | }; |
| 33 | |
| 34 | /* Enable early UART2 channel 1 on the RK322x */ |
| 35 | rk_clrsetreg(&grf->gpio1b_iomux, |
| 36 | GPIO1B1_MASK | GPIO1B2_MASK, |
| 37 | GPIO1B2_UART21_SIN << GPIO1B2_SHIFT | |
| 38 | GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT); |
| 39 | /* Set channel C as UART2 input */ |
| 40 | rk_clrsetreg(&grf->con_iomux, |
| 41 | CON_IOMUX_UART2SEL_MASK, |
| 42 | CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT); |
| 43 | } |
| 44 | #endif |