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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Thierry Reding6173c452014-12-09 22:25:05 -07002/*
3 * Copyright (C) 2014 NVIDIA Corporation
Thierry Reding6173c452014-12-09 22:25:05 -07004 */
5
6#ifndef __POWER_AS3722_H__
7#define __POWER_AS3722_H__
8
Simon Glass401d1c42020-10-30 21:38:53 -06009struct udevice;
10
Thierry Reding6173c452014-12-09 22:25:05 -070011#define AS3722_GPIO_OUTPUT_VDDH (1 << 0)
12#define AS3722_GPIO_INVERT (1 << 1)
13
Simon Glassdeea2112017-07-25 08:30:10 -060014#define AS3722_DEVICE_ID 0x0c
15#define AS3722_SD_VOLTAGE(n) (0x00 + (n))
16#define AS3722_LDO_VOLTAGE(n) (0x10 + (n))
17#define AS3722_SD_CONTROL 0x4d
Marcel Ziswiler4616e332018-05-08 17:34:08 +020018#define AS3722_LDO_CONTROL0 0x4e
19#define AS3722_LDO_CONTROL1 0x4f
Simon Glassdeea2112017-07-25 08:30:10 -060020#define AS3722_ASIC_ID1 0x90
21#define AS3722_ASIC_ID2 0x91
22
Simon Glassc2012cb2017-07-25 08:30:11 -060023#define AS3722_GPIO_CONTROL(n) (0x08 + (n))
Simon Glasse3f44f52017-07-25 08:30:12 -060024#define AS3722_GPIO_SIGNAL_OUT 0x20
Simon Glassc2012cb2017-07-25 08:30:11 -060025#define AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH (1 << 0)
26#define AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL (7 << 0)
27#define AS3722_GPIO_CONTROL_INVERT (1 << 7)
28
Simon Glasse3f44f52017-07-25 08:30:12 -060029int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value);
Marcel Ziswilerde429752018-05-08 17:34:10 +020030int as3722_ldo_set_voltage(struct udevice *dev, unsigned int ldo, u8 value);
Thierry Reding6173c452014-12-09 22:25:05 -070031
32#endif /* __POWER_AS3722_H__ */