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Luca Ceresolifb6e1f12011-04-20 11:02:08 -04001/*
2 * (C) Copyright 2011 Comelit Group SpA
3 * Luca Ceresoli <luca.ceresoli@comelit.it>
4 *
5 * Based on omap3_beagle.h:
6 * (C) Copyright 2006-2008
7 * Texas Instruments.
8 * Richard Woodruff <r-woodruff2@ti.com>
9 * Syed Mohammed Khasim <x0khasim@ti.com>
10 *
11 * Configuration settings for the Comelit DIG297 board.
12 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020013 * SPDX-License-Identifier: GPL-2.0+
Luca Ceresolifb6e1f12011-04-20 11:02:08 -040014 */
15
16#ifndef __CONFIG_H
17#define __CONFIG_H
18
Luca Ceresoli30dca9d2011-11-04 13:42:09 -040019#include <asm/mach-types.h>
20#ifdef MACH_TYPE_OMAP3_CPS
21#error "MACH_TYPE_OMAP3_CPS has been defined properly, please remove this."
22#else
23#define MACH_TYPE_OMAP3_CPS 2751
24#endif
25#define CONFIG_MACH_TYPE MACH_TYPE_OMAP3_CPS
26
Luca Ceresolifb6e1f12011-04-20 11:02:08 -040027/*
28 * High Level Configuration Options
29 */
Luca Ceresolifb6e1f12011-04-20 11:02:08 -040030#define CONFIG_OMAP /* in a TI OMAP core */
Marek Vasut308252a2012-07-21 05:02:23 +000031#define CONFIG_OMAP_GPIO
Lokesh Vutla806d2792013-07-30 11:36:30 +053032#define CONFIG_OMAP_COMMON
Luca Ceresolifb6e1f12011-04-20 11:02:08 -040033
34#define CONFIG_SYS_TEXT_BASE 0x80008000
35
36#define CONFIG_SDRC /* The chip has SDRC controller */
37
38#include <asm/arch/cpu.h> /* get chip and board defs */
39#include <asm/arch/omap3.h>
40
41/*
42 * Display CPU and Board information
43 */
44#define CONFIG_DISPLAY_CPUINFO
45#define CONFIG_DISPLAY_BOARDINFO
46
47/* Clock Defines */
48#define V_OSCK 26000000 /* Clock output from T2 */
49#define V_SCLK (V_OSCK >> 1)
50
Luca Ceresolifb6e1f12011-04-20 11:02:08 -040051#define CONFIG_MISC_INIT_R
52
53#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
54#define CONFIG_SETUP_MEMORY_TAGS
55#define CONFIG_INITRD_TAG
56#define CONFIG_REVISION_TAG
57
58/*
59 * Size of malloc() pool
60 */
61#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
62 /* Sector */
63#define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* UBI needs >= 512 kB */
64
65/*
66 * Hardware drivers
67 */
68
69/*
70 * NS16550 Configuration
71 */
72#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
73
74#define CONFIG_SYS_NS16550
75#define CONFIG_SYS_NS16550_SERIAL
76#define CONFIG_SYS_NS16550_REG_SIZE (-4)
77#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
78
79/*
80 * select serial console configuration: UART3 (ttyO2)
81 */
82#define CONFIG_CONS_INDEX 3
83#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
84#define CONFIG_SERIAL3 3
85
86/* allow to overwrite serial and ethaddr */
87#define CONFIG_ENV_OVERWRITE
88#define CONFIG_BAUDRATE 115200
89#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
90 115200}
Tom Rinieaff60d2011-09-03 21:50:05 -040091#define CONFIG_GENERIC_MMC 1
92#define CONFIG_MMC 1
93#define CONFIG_OMAP_HSMMC 1
Luca Ceresolifb6e1f12011-04-20 11:02:08 -040094#define CONFIG_DOS_PARTITION
95
Luca Ceresolifb6e1f12011-04-20 11:02:08 -040096/* library portions to compile in */
97#define CONFIG_RBTREE
98#define CONFIG_MTD_PARTITIONS
99#define CONFIG_LZO
100
101/* commands to include */
102#include <config_cmd_default.h>
103
104#define CONFIG_CMD_FAT /* FAT support */
105#define CONFIG_CMD_UBI /* UBI Support */
106#define CONFIG_CMD_UBIFS /* UBIFS Support */
107#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
108#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
109#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
110#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:896k(uboot),"\
111 "128k(uboot-env),3m(kernel),252m(ubi)"
112
113#define CONFIG_CMD_I2C /* I2C serial bus support */
114#define CONFIG_CMD_MMC /* MMC support */
115#define CONFIG_CMD_NAND /* NAND support */
116
117#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
118#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
119#undef CONFIG_CMD_IMI /* iminfo */
120#undef CONFIG_CMD_IMLS /* List all found images */
121#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
122#undef CONFIG_CMD_NFS /* NFS support */
123
124#define CONFIG_SYS_NO_FLASH
Heiko Schocher6789e842013-10-22 11:03:18 +0200125#define CONFIG_SYS_I2C
126#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
127#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
128#define CONFIG_SYS_I2C_OMAP34XX
Luca Ceresolifb6e1f12011-04-20 11:02:08 -0400129
130/*
131 * TWL4030
132 */
133#define CONFIG_TWL4030_POWER
134#define CONFIG_TWL4030_LED
135
136/*
137 * Board NAND Info.
138 */
139#define CONFIG_NAND_OMAP_GPMC
pekon guptab80a6602014-05-06 00:46:19 +0530140#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
Luca Ceresolifb6e1f12011-04-20 11:02:08 -0400141#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
142 /* to access nand */
143#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
144 /* to access nand at */
145 /* CS0 */
Luca Ceresolifb6e1f12011-04-20 11:02:08 -0400146#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
147
148#if defined(CONFIG_CMD_NET)
149/*
150 * SMSC9220 Ethernet
151 */
152
Luca Ceresolifb6e1f12011-04-20 11:02:08 -0400153#define CONFIG_SMC911X
154#define CONFIG_SMC911X_32_BIT
155#define CONFIG_SMC911X_BASE 0x2C000000
156
157#endif /* (CONFIG_CMD_NET) */
158
159/* Environment information */
160#define CONFIG_BOOTDELAY 1
161
162#define CONFIG_EXTRA_ENV_SETTINGS \
163 "loadaddr=0x82000000\0" \
164 "console=ttyO2,115200n8\0" \
165 "mtdids=" MTDIDS_DEFAULT "\0" \
166 "mtdparts=" MTDPARTS_DEFAULT "\0" \
167 "partition=nand0,3\0"\
168 "mmcroot=/dev/mmcblk0p2 rw\0" \
169 "mmcrootfstype=ext3 rootwait\0" \
170 "nandroot=ubi0:rootfs ro\0" \
171 "nandrootfstype=ubifs\0" \
172 "nfspath=/srv/nfs\0" \
173 "tftpfilename=uImage\0" \
174 "gatewayip=0.0.0.0\0" \
175 "mmcargs=setenv bootargs console=${console} " \
176 "${mtdparts} " \
177 "root=${mmcroot} " \
178 "rootfstype=${mmcrootfstype} " \
179 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
180 "${netmask}:${hostname}::off\0" \
181 "nandargs=setenv bootargs console=${console} " \
182 "${mtdparts} " \
183 "ubi.mtd=3 " \
184 "root=${nandroot} " \
185 "rootfstype=${nandrootfstype} " \
186 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
187 "${netmask}:${hostname}::off\0" \
188 "netargs=setenv bootargs console=${console} " \
189 "${mtdparts} " \
190 "root=/dev/nfs rw " \
191 "nfsroot=${serverip}:${nfspath} " \
192 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
193 "${netmask}:${hostname}::off\0" \
194 "mmcboot=echo Booting from mmc ...; " \
195 "run mmcargs; " \
196 "bootm ${loadaddr}\0" \
197 "nandboot=echo Booting from nand ...; " \
198 "run nandargs; " \
199 "nand read ${loadaddr} 100000 300000; " \
200 "bootm ${loadaddr}\0" \
201 "netboot=echo Booting from network ...; " \
202 "run netargs; " \
203 "tftp ${loadaddr} ${serverip}:${tftpfilename}; " \
204 "bootm ${loadaddr}\0" \
205 "resetenv=nand erase e0000 20000\0"\
206
207#define CONFIG_BOOTCOMMAND \
208 "run nandboot"
209
210#define CONFIG_AUTO_COMPLETE
211/*
212 * Miscellaneous configurable options
213 */
214#define CONFIG_SYS_LONGHELP /* undef to save memory */
215#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Luca Ceresolifb6e1f12011-04-20 11:02:08 -0400216#define CONFIG_SYS_PROMPT "DIG297# "
217#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
218/* Print Buffer Size */
219#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
220 sizeof(CONFIG_SYS_PROMPT) + 16)
221#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
222/* Boot Argument Buffer Size */
223#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
224
225#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
226 /* works on */
227#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
228 0x01F00000) /* 31MB */
229
230#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
231 /* load address */
232
233/*
234 * OMAP3 has 12 GP timers, they can be driven by the system clock
235 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
236 * This rate is divided by a local divisor.
237 */
238#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
239#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Luca Ceresolifb6e1f12011-04-20 11:02:08 -0400240
241/*-----------------------------------------------------------------------
Luca Ceresolifb6e1f12011-04-20 11:02:08 -0400242 * Physical Memory Map
243 */
244#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
245#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Luca Ceresolifb6e1f12011-04-20 11:02:08 -0400246#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
247
Luca Ceresolifb6e1f12011-04-20 11:02:08 -0400248/*-----------------------------------------------------------------------
249 * FLASH and environment organization
250 */
251
252/* **** PISMO SUPPORT *** */
Luca Ceresolifb6e1f12011-04-20 11:02:08 -0400253#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
254
255#define CONFIG_SYS_FLASH_BASE boot_flash_base
256
257/* Monitor at start of flash */
258#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
259
260#define CONFIG_ENV_IS_IN_NAND
261#define SMNAND_ENV_OFFSET 0x0E0000 /* environment starts here */
262
263#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
264#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
265#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
266
267#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
268#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
269#define CONFIG_SYS_INIT_RAM_SIZE 0x800
270#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
271 CONFIG_SYS_INIT_RAM_SIZE - \
272 GENERATED_GBL_DATA_SIZE)
273
274#endif /* __CONFIG_H */