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Rob Herring37fc0ed2011-10-24 08:50:20 +00001/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Rob Herring37fc0ed2011-10-24 08:50:20 +00005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Rob Herringac9ae132014-04-10 16:17:30 -050010#include <config_distro_defaults.h>
11
Rob Herring185a5bb2013-06-12 22:24:47 -050012#define CONFIG_SYS_DCACHE_OFF
Rob Herring185a5bb2013-06-12 22:24:47 -050013#define CONFIG_SYS_THUMB_BUILD
Rob Herring37fc0ed2011-10-24 08:50:20 +000014
15#define CONFIG_SYS_NO_FLASH
Rob Herring37fc0ed2011-10-24 08:50:20 +000016
Rob Herring37fc0ed2011-10-24 08:50:20 +000017#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
18
Rob Herring9df1bd42013-10-04 10:22:43 -050019#define CONFIG_SYS_TIMER_RATE (150000000/256)
20#define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4)
21#define CONFIG_SYS_TIMER_COUNTS_DOWN
22
Rob Herring37fc0ed2011-10-24 08:50:20 +000023/*
24 * Size of malloc() pool
25 */
26#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
27
28#define CONFIG_PL011_SERIAL
29#define CONFIG_PL011_CLOCK 150000000
30#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) }
31#define CONFIG_CONS_INDEX 0
32
Rob Herring185a5bb2013-06-12 22:24:47 -050033#define CONFIG_BAUDRATE 115200
Rob Herring37fc0ed2011-10-24 08:50:20 +000034
Rob Herring877012d2012-02-01 16:57:54 +000035#define CONFIG_BOOTCOUNT_LIMIT
Stefan Roese0044c422012-08-16 17:55:41 +000036#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
37#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
Rob Herring877012d2012-02-01 16:57:54 +000038#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c
39
Rob Herring37fc0ed2011-10-24 08:50:20 +000040#define CONFIG_MISC_INIT_R
Rob Herring344ca0b2013-08-24 10:10:54 -050041#define CONFIG_LIBATA
Rob Herring37fc0ed2011-10-24 08:50:20 +000042#define CONFIG_SCSI_AHCI
43#define CONFIG_SCSI_AHCI_PLAT
44#define CONFIG_SYS_SCSI_MAX_SCSI_ID 5
45#define CONFIG_SYS_SCSI_MAX_LUN 1
46#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
47 CONFIG_SYS_SCSI_MAX_LUN)
48
Rob Herring9a420982011-12-15 11:15:50 +000049#define CONFIG_CALXEDA_XGMAC
50
Rob Herring37fc0ed2011-10-24 08:50:20 +000051/*
52 * Command line configuration.
53 */
Simon Glassc649e3c2016-05-01 11:36:02 -060054#define CONFIG_SCSI
Rob Herring37fc0ed2011-10-24 08:50:20 +000055
Rob Herringe1df2832013-06-12 22:24:51 -050056#define CONFIG_BOOT_RETRY_TIME -1
57#define CONFIG_RESET_TO_RETRY
Stefan Roesed126e012015-05-18 14:08:23 +020058
Rob Herring37fc0ed2011-10-24 08:50:20 +000059/*
60 * Miscellaneous configurable options
61 */
Rob Herring185a5bb2013-06-12 22:24:47 -050062#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Rob Herring37fc0ed2011-10-24 08:50:20 +000063#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */
64#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Rob Herring37fc0ed2011-10-24 08:50:20 +000065/* Print Buffer Size */
66#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
67 sizeof(CONFIG_SYS_PROMPT)+16)
68
69#define CONFIG_SYS_LOAD_ADDR 0x800000
Rob Herring185a5bb2013-06-12 22:24:47 -050070#define CONFIG_SYS_64BIT_LBA
71
Rob Herring37fc0ed2011-10-24 08:50:20 +000072/*-----------------------------------------------------------------------
Rob Herring37fc0ed2011-10-24 08:50:20 +000073 * Physical Memory Map
Rob Herring32b4a8a2015-06-21 00:29:55 +010074 * The DRAM is already setup, so do not touch the DT node later.
Rob Herring37fc0ed2011-10-24 08:50:20 +000075 */
Rob Herring32b4a8a2015-06-21 00:29:55 +010076#define CONFIG_NR_DRAM_BANKS 0
Rob Herring37fc0ed2011-10-24 08:50:20 +000077#define PHYS_SDRAM_1_SIZE (4089 << 20)
78#define CONFIG_SYS_MEMTEST_START 0x100000
79#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000)
80
Jason Hobbsa34e8542012-02-01 16:57:56 +000081/* Environment data setup
82*/
83#define CONFIG_ENV_IS_IN_NVRAM
84#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
85#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */
86#define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */
87#define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR
Rob Herring37fc0ed2011-10-24 08:50:20 +000088
89#define CONFIG_SYS_SDRAM_BASE 0x00000000
Rob Herring7b816492012-02-01 16:57:53 +000090#define CONFIG_SYS_TEXT_BASE 0x00008000
Rob Herring37fc0ed2011-10-24 08:50:20 +000091#define CONFIG_SYS_INIT_SP_ADDR 0x01000000
92#define CONFIG_SKIP_LOWLEVEL_INIT
93
94#endif