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Masahiro Yamada7f368552014-10-03 19:21:05 +09001/*
Masahiro Yamadaf6e7f072015-05-29 17:30:00 +09002 * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada7f368552014-10-03 19:21:05 +09003 *
Masahiro Yamada7f368552014-10-03 19:21:05 +09004 * SPDX-License-Identifier: GPL-2.0+
5 */
6
Masahiro Yamadaf6e7f072015-05-29 17:30:00 +09007#include <linux/io.h>
Masahiro Yamada325b7082014-10-30 12:11:14 +09008#include <linux/serial_reg.h>
Masahiro Yamadab37a1cc2016-03-24 22:32:38 +09009#include <linux/sizes.h>
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090010#include <asm/errno.h>
11#include <dm/device.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050012#include <mapmem.h>
Masahiro Yamada7f368552014-10-03 19:21:05 +090013#include <serial.h>
Masahiro Yamada625177d2014-11-26 18:34:00 +090014#include <fdtdec.h>
Masahiro Yamada7f368552014-10-03 19:21:05 +090015
Masahiro Yamada7f368552014-10-03 19:21:05 +090016/*
17 * Note: Register map is slightly different from that of 16550.
18 */
19struct uniphier_serial {
Masahiro Yamadad0c47b32015-02-27 02:26:46 +090020 u32 rx; /* In: Receive buffer */
21#define tx rx /* Out: Transmit buffer */
22 u32 ier; /* Interrupt Enable Register */
23 u32 iir; /* In: Interrupt ID Register */
24 u32 char_fcr; /* Charactor / FIFO Control Register */
25 u32 lcr_mcr; /* Line/Modem Control Register */
26#define LCR_SHIFT 8
27#define LCR_MASK (0xff << (LCR_SHIFT))
28 u32 lsr; /* In: Line Status Register */
29 u32 msr; /* In: Modem Status Register */
30 u32 __rsv0;
31 u32 __rsv1;
32 u32 dlr; /* Divisor Latch Register */
Masahiro Yamada7f368552014-10-03 19:21:05 +090033};
34
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090035struct uniphier_serial_private_data {
36 struct uniphier_serial __iomem *membase;
Masahiro Yamada6d99cfa2015-08-28 20:13:19 +090037 unsigned int uartclk;
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090038};
Masahiro Yamada7f368552014-10-03 19:21:05 +090039
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090040#define uniphier_serial_port(dev) \
41 ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
42
Masahiro Yamadad9bc8fd2014-10-24 17:00:11 +090043static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
Masahiro Yamada7f368552014-10-03 19:21:05 +090044{
Masahiro Yamada6d99cfa2015-08-28 20:13:19 +090045 struct uniphier_serial_private_data *priv = dev_get_priv(dev);
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090046 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
Masahiro Yamada7f368552014-10-03 19:21:05 +090047 const unsigned int mode_x_div = 16;
48 unsigned int divisor;
Masahiro Yamada7f368552014-10-03 19:21:05 +090049
Masahiro Yamada6d99cfa2015-08-28 20:13:19 +090050 divisor = DIV_ROUND_CLOSEST(priv->uartclk, mode_x_div * baudrate);
Masahiro Yamada7f368552014-10-03 19:21:05 +090051
Masahiro Yamadad0c47b32015-02-27 02:26:46 +090052 writel(divisor, &port->dlr);
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090053
54 return 0;
Masahiro Yamada7f368552014-10-03 19:21:05 +090055}
56
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090057static int uniphier_serial_getc(struct udevice *dev)
Masahiro Yamada7f368552014-10-03 19:21:05 +090058{
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090059 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
Masahiro Yamada7f368552014-10-03 19:21:05 +090060
Masahiro Yamadad0c47b32015-02-27 02:26:46 +090061 if (!(readl(&port->lsr) & UART_LSR_DR))
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090062 return -EAGAIN;
Masahiro Yamada7f368552014-10-03 19:21:05 +090063
Masahiro Yamadad0c47b32015-02-27 02:26:46 +090064 return readl(&port->rx);
Masahiro Yamada7f368552014-10-03 19:21:05 +090065}
66
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090067static int uniphier_serial_putc(struct udevice *dev, const char c)
Masahiro Yamada7f368552014-10-03 19:21:05 +090068{
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090069 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
Masahiro Yamada7f368552014-10-03 19:21:05 +090070
Masahiro Yamadad0c47b32015-02-27 02:26:46 +090071 if (!(readl(&port->lsr) & UART_LSR_THRE))
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090072 return -EAGAIN;
Masahiro Yamada7f368552014-10-03 19:21:05 +090073
Masahiro Yamadad0c47b32015-02-27 02:26:46 +090074 writel(c, &port->tx);
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090075
76 return 0;
Masahiro Yamada7f368552014-10-03 19:21:05 +090077}
78
Masahiro Yamadabb721482014-10-24 17:00:10 +090079static int uniphier_serial_pending(struct udevice *dev, bool input)
80{
81 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
82
83 if (input)
Masahiro Yamadad0c47b32015-02-27 02:26:46 +090084 return readl(&port->lsr) & UART_LSR_DR;
Masahiro Yamadabb721482014-10-24 17:00:10 +090085 else
Masahiro Yamadad0c47b32015-02-27 02:26:46 +090086 return !(readl(&port->lsr) & UART_LSR_THRE);
Masahiro Yamadabb721482014-10-24 17:00:10 +090087}
88
Masahiro Yamadad9bc8fd2014-10-24 17:00:11 +090089static int uniphier_serial_probe(struct udevice *dev)
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090090{
Masahiro Yamada6d99cfa2015-08-28 20:13:19 +090091 DECLARE_GLOBAL_DATA_PTR;
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090092 struct uniphier_serial_private_data *priv = dev_get_priv(dev);
Masahiro Yamada099cf772015-02-27 02:26:47 +090093 struct uniphier_serial __iomem *port;
Masahiro Yamada6d99cfa2015-08-28 20:13:19 +090094 fdt_addr_t base;
Masahiro Yamada6d99cfa2015-08-28 20:13:19 +090095 u32 tmp;
Masahiro Yamadad064cbf2014-10-23 22:26:10 +090096
Masahiro Yamadab37a1cc2016-03-24 22:32:38 +090097 base = dev_get_addr(dev);
98 if (base == FDT_ADDR_T_NONE)
99 return -EINVAL;
Masahiro Yamada6d99cfa2015-08-28 20:13:19 +0900100
Masahiro Yamadab37a1cc2016-03-24 22:32:38 +0900101 port = map_sysmem(base, SZ_64);
Masahiro Yamada099cf772015-02-27 02:26:47 +0900102 if (!port)
Masahiro Yamadad064cbf2014-10-23 22:26:10 +0900103 return -ENOMEM;
104
Masahiro Yamada099cf772015-02-27 02:26:47 +0900105 priv->membase = port;
106
Masahiro Yamada6d99cfa2015-08-28 20:13:19 +0900107 priv->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
108 "clock-frequency", 0);
109
Masahiro Yamada099cf772015-02-27 02:26:47 +0900110 tmp = readl(&port->lcr_mcr);
111 tmp &= ~LCR_MASK;
112 tmp |= UART_LCR_WLEN8 << LCR_SHIFT;
113 writel(tmp, &port->lcr_mcr);
114
Masahiro Yamadad064cbf2014-10-23 22:26:10 +0900115 return 0;
116}
117
Masahiro Yamadad9bc8fd2014-10-24 17:00:11 +0900118static int uniphier_serial_remove(struct udevice *dev)
Masahiro Yamadad064cbf2014-10-23 22:26:10 +0900119{
120 unmap_sysmem(uniphier_serial_port(dev));
121
122 return 0;
123}
124
Masahiro Yamada625177d2014-11-26 18:34:00 +0900125static const struct udevice_id uniphier_uart_of_match[] = {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900126 { .compatible = "socionext,uniphier-uart" },
127 { /* sentinel */ }
Masahiro Yamada7f368552014-10-03 19:21:05 +0900128};
129
Masahiro Yamadad064cbf2014-10-23 22:26:10 +0900130static const struct dm_serial_ops uniphier_serial_ops = {
131 .setbrg = uniphier_serial_setbrg,
132 .getc = uniphier_serial_getc,
133 .putc = uniphier_serial_putc,
Masahiro Yamadabb721482014-10-24 17:00:10 +0900134 .pending = uniphier_serial_pending,
Masahiro Yamadad064cbf2014-10-23 22:26:10 +0900135};
136
137U_BOOT_DRIVER(uniphier_serial) = {
Masahiro Yamada6d99cfa2015-08-28 20:13:19 +0900138 .name = "uniphier-uart",
Masahiro Yamadad064cbf2014-10-23 22:26:10 +0900139 .id = UCLASS_SERIAL,
Masahiro Yamada6d99cfa2015-08-28 20:13:19 +0900140 .of_match = uniphier_uart_of_match,
Masahiro Yamadad064cbf2014-10-23 22:26:10 +0900141 .probe = uniphier_serial_probe,
142 .remove = uniphier_serial_remove,
143 .priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
Masahiro Yamadad064cbf2014-10-23 22:26:10 +0900144 .ops = &uniphier_serial_ops,
Masahiro Yamadad064cbf2014-10-23 22:26:10 +0900145};