Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 2 | /* |
3 | * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> | ||||
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 4 | */ |
5 | |||||
Paul Burton | 7a9d109 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 6 | #ifndef _MALTA_CONFIG_H |
7 | #define _MALTA_CONFIG_H | ||||
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 8 | |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 9 | /* |
10 | * System configuration | ||||
11 | */ | ||||
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 12 | |
13 | /* | ||||
14 | * CPU Configuration | ||||
15 | */ | ||||
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 16 | |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 17 | /* |
18 | * Memory map | ||||
19 | */ | ||||
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 20 | |
Paul Burton | 0f832b9 | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 21 | #ifdef CONFIG_64BIT |
Tom Rini | aa6e94d | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 22 | # define CFG_SYS_SDRAM_BASE 0xffffffff80000000 |
Paul Burton | 0f832b9 | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 23 | #else |
Tom Rini | aa6e94d | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 24 | # define CFG_SYS_SDRAM_BASE 0x80000000 |
Paul Burton | 0f832b9 | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 25 | #endif |
Tom Rini | aa6e94d | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 26 | #define CFG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 27 | |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 28 | #define CFG_SYS_INIT_SP_OFFSET 0x400000 |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 29 | |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 30 | /* |
31 | * Serial driver | ||||
32 | */ | ||||
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 33 | |
34 | /* | ||||
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 35 | * Flash configuration |
36 | */ | ||||
Paul Burton | 0f832b9 | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 37 | #ifdef CONFIG_64BIT |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 38 | # define CFG_SYS_FLASH_BASE 0xffffffffbe000000 |
Paul Burton | 0f832b9 | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 39 | #else |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 40 | # define CFG_SYS_FLASH_BASE 0xbe000000 |
Paul Burton | 0f832b9 | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 41 | #endif |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 42 | |
43 | /* | ||||
Paul Burton | fba6f45 | 2013-11-08 11:18:56 +0000 | [diff] [blame] | 44 | * Environment |
45 | */ | ||||
Paul Burton | fba6f45 | 2013-11-08 11:18:56 +0000 | [diff] [blame] | 46 | |
47 | /* | ||||
Paul Burton | ba21a45 | 2015-01-29 10:38:20 +0000 | [diff] [blame] | 48 | * IDE/ATA |
49 | */ | ||||
Paul Burton | ba21a45 | 2015-01-29 10:38:20 +0000 | [diff] [blame] | 50 | |
51 | /* | ||||
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 52 | * Commands |
53 | */ | ||||
Gabor Juhos | feaa606 | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 54 | |
Paul Burton | 7a9d109 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 55 | #endif /* _MALTA_CONFIG_H */ |