blob: 36a8f0d098e2df26e76abadde9df6ac1aa79b9c5 [file] [log] [blame]
Simon Glass6fb9ac12015-02-13 12:20:47 -07001config CMD_CROS_EC
2 bool "Enable crosec command"
3 depends on CROS_EC
4 help
5 Enable command-line access to the Chrome OS EC (Embedded
6 Controller). This provides the 'crosec' command which has
7 a number of sub-commands for performing EC tasks such as
8 updating its flash, accessing a small saved context area
9 and talking to the I2C bus behind the EC (if there is one).
10
11config CROS_EC
12 bool "Enable Chrome OS EC"
13 help
14 Enable access to the Chrome OS EC. This is a separate
15 microcontroller typically available on a SPI bus on Chromebooks. It
16 provides access to the keyboard, some internal storage and may
17 control access to the battery and main PMIC depending on the
18 device. You can use the 'crosec' command to access it.
19
20config CROS_EC_I2C
21 bool "Enable Chrome OS EC I2C driver"
22 depends on CROS_EC
23 help
24 Enable I2C access to the Chrome OS EC. This is used on older
25 ARM Chromebooks such as snow and spring before the standard bus
26 changed to SPI. The EC will accept commands across the I2C using
27 a special message protocol, and provide responses.
28
29config CROS_EC_LPC
30 bool "Enable Chrome OS EC LPC driver"
31 depends on CROS_EC
32 help
33 Enable I2C access to the Chrome OS EC. This is used on x86
34 Chromebooks such as link and falco. The keyboard is provided
35 through a legacy port interface, so on x86 machines the main
36 function of the EC is power and thermal management.
37
38config CROS_EC_SPI
39 bool "Enable Chrome OS EC SPI driver"
40 depends on CROS_EC
41 help
42 Enable SPI access to the Chrome OS EC. This is used on newer
43 ARM Chromebooks such as pit, pi and nyan-big. The SPI interface
44 provides a faster and more robust interface than I2C but the bugs
45 are less interesting.
46
Simon Glassf94a1be2015-02-05 21:41:35 -070047config DM_CROS_EC
48 bool "Enable Driver Model for Chrome OS EC"
49 depends on DM
50 help
51 Enable driver model for the Chrome OS EC interface. This
52 allows the cros_ec SPI driver to operate with CONFIG_DM_SPI
53 but otherwise makes few changes. Since cros_ec also supports
Simon Glass6fb9ac12015-02-13 12:20:47 -070054 LPC (which doesn't support driver model yet), a full
Simon Glassf94a1be2015-02-05 21:41:35 -070055 conversion is not yet possible.
gaurav ranafe783782015-02-27 09:44:22 +053056
57config CONFIG_FSL_SEC_MON
58 bool "Enable FSL SEC_MON Driver"
59 help
60 Freescale Security Monitor block is responsible for monitoring
61 system states.
62 Security Monitor can be transitioned on any security failures,
63 like software violations or hardware security violations.