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Jason Jinece92f82007-07-06 08:34:56 +08001/****************************************************************************
2*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +02003* Video BOOT Graphics Card POST Module
Jason Jinece92f82007-07-06 08:34:56 +08004*
5* ========================================================================
Kumar Gala4c2e3da2009-07-28 21:49:52 -05006* Copyright (C) 2007 Freescale Semiconductor, Inc.
Jason Jinece92f82007-07-06 08:34:56 +08007* Jason Jin <Jason.jin@freescale.com>
8*
9* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
10*
11* This file may be distributed and/or modified under the terms of the
12* GNU General Public License version 2.0 as published by the Free
13* Software Foundation and appearing in the file LICENSE.GPL included
14* in the packaging of this file.
15*
16* Licensees holding a valid Commercial License for this product from
17* SciTech Software, Inc. may use this file in accordance with the
18* Commercial License Agreement provided with the Software.
19*
20* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
21* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22* PURPOSE.
23*
24* See http://www.scitechsoft.com/license/ for information about
25* the licensing options available and how to purchase a Commercial
26* License Agreement.
27*
28* Contact license@scitechsoft.com if any conditions of this licensing
29* are not clear to you, or you have questions about licensing options.
30*
31* ========================================================================
32*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020033* Language: ANSI C
34* Environment: Linux Kernel
35* Developer: Kendall Bennett
Jason Jinece92f82007-07-06 08:34:56 +080036*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020037* Description: Module to implement booting PCI/AGP controllers on the
38* bus. We use the x86 real mode emulator to run the BIOS on
39* graphics controllers to bring the cards up.
Jason Jinece92f82007-07-06 08:34:56 +080040*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020041* Note that at present this module does *not* support
42* multiple controllers.
Jason Jinece92f82007-07-06 08:34:56 +080043*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020044* The orignal name of this file is warmboot.c.
45* Jason ported this file to u-boot to run the ATI video card
46* BIOS in u-boot.
Jason Jinece92f82007-07-06 08:34:56 +080047****************************************************************************/
48#include <common.h>
Simon Glass401d1c42020-10-30 21:38:53 -060049#include <compiler.h>
Simon Glass4c59f952014-11-14 20:56:40 -070050#include <bios_emul.h>
51#include <errno.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060052#include <log.h>
Jason Jinece92f82007-07-06 08:34:56 +080053#include <malloc.h>
Simon Glass4c59f952014-11-14 20:56:40 -070054#include <vbe.h>
Simon Glassc05ed002020-05-10 11:40:11 -060055#include <linux/delay.h>
Simon Glass4c59f952014-11-14 20:56:40 -070056#include "biosemui.h"
Jason Jinece92f82007-07-06 08:34:56 +080057
58/* Length of the BIOS image */
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020059#define MAX_BIOSLEN (128 * 1024L)
Jason Jinece92f82007-07-06 08:34:56 +080060
Jason Jinece92f82007-07-06 08:34:56 +080061/* Place to save PCI BAR's that we change and later restore */
62static u32 saveROMBaseAddress;
63static u32 saveBaseAddress10;
64static u32 saveBaseAddress14;
65static u32 saveBaseAddress18;
66static u32 saveBaseAddress20;
67
Simon Glass222f25f2014-12-29 19:32:26 -070068/* Addres im memory of VBE region */
69const int vbe_offset = 0x2000;
70
Bin Mengca5eb0c2018-04-11 22:02:15 -070071#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
Simon Glass222f25f2014-12-29 19:32:26 -070072static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info,
73 u32 x86_dword_ptr)
Simon Glass4c59f952014-11-14 20:56:40 -070074{
Simon Glass222f25f2014-12-29 19:32:26 -070075 u32 seg_ofs, flat;
76
77 seg_ofs = le32_to_cpu(x86_dword_ptr);
78 flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff);
79 if (flat >= 0xc0000)
80 return vga_info->BIOSImage + flat - 0xc0000;
81 else
82 return buf + (flat - vbe_offset);
83}
84
85static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
86 int vesa_mode, struct vbe_mode_info *mode_info)
87{
88 void *buffer = (void *)(M.mem_base + vbe_offset);
89 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
90 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
91 struct vesa_mode_info *vm;
92 struct vbe_info *info;
93 const u16 *modes_bios, *ptr;
94 u16 *modes;
95 int size;
96
97 debug("VBE: Getting information\n");
98 regs->e.eax = VESA_GET_INFO;
99 regs->e.esi = buffer_seg;
100 regs->e.edi = buffer_adr;
101 info = buffer;
102 memset(info, '\0', sizeof(*info));
103 strcpy(info->signature, "VBE2");
104 BE_int86(0x10, regs, regs);
105 if (regs->e.eax != 0x4f) {
106 debug("VESA_GET_INFO: error %x\n", regs->e.eax);
107 return -ENOSYS;
108 }
109 debug("version %x\n", le16_to_cpu(info->version));
110 debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info,
111 info->oem_string_ptr));
112 debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info,
113 info->vendor_name_ptr));
114 debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info,
115 info->product_name_ptr));
116 debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info,
117 info->product_rev_ptr));
118 modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr);
119 debug("Modes: ");
120 for (ptr = modes_bios; *ptr != 0xffff; ptr++)
121 debug("%x ", le16_to_cpu(*ptr));
122 debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4);
123 size = (ptr - modes_bios) * sizeof(u16) + 2;
124 modes = malloc(size);
125 if (!modes)
126 return -ENOMEM;
127 memcpy(modes, modes_bios, size);
128
129 regs->e.eax = VESA_GET_CUR_MODE;
130 BE_int86(0x10, regs, regs);
131 if (regs->e.eax != 0x4f) {
132 debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax);
133 return -ENOSYS;
134 }
135 debug("Current mode %x\n", regs->e.ebx);
136
137 for (ptr = modes; *ptr != 0xffff; ptr++) {
138 int mode = le16_to_cpu(*ptr);
139 bool linear_ok;
140 int attr;
141
Simon Glass222f25f2014-12-29 19:32:26 -0700142 debug("Mode %x: ", mode);
143 memset(buffer, '\0', sizeof(struct vbe_mode_info));
144 regs->e.eax = VESA_GET_MODE_INFO;
145 regs->e.ebx = 0;
146 regs->e.ecx = mode;
147 regs->e.edx = 0;
148 regs->e.esi = buffer_seg;
149 regs->e.edi = buffer_adr;
150 BE_int86(0x10, regs, regs);
151 if (regs->e.eax != 0x4f) {
152 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
153 continue;
154 }
155 memcpy(mode_info->mode_info_block, buffer,
156 sizeof(struct vesa_mode_info));
157 mode_info->valid = true;
158 vm = &mode_info->vesa;
159 attr = le16_to_cpu(vm->mode_attributes);
160 linear_ok = attr & 0x80;
161 debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n",
162 le16_to_cpu(vm->x_resolution),
163 le16_to_cpu(vm->y_resolution),
164 vm->bits_per_pixel, vm->memory_model,
165 linear_ok ? "OK" : "not available",
166 attr);
167 debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n",
168 vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos,
169 vm->red_mask_size, vm->green_mask_size,
170 vm->blue_mask_size);
171 }
172
173 return 0;
174}
175
176static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
177 struct vbe_mode_info *mode_info)
178{
179 void *buffer = (void *)(M.mem_base + vbe_offset);
180 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
181 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
182 struct vesa_mode_info *vm;
183
Simon Glass4c59f952014-11-14 20:56:40 -0700184 debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
Simon Glass4c59f952014-11-14 20:56:40 -0700185 regs->e.eax = VESA_SET_MODE;
186 regs->e.ebx = vesa_mode;
Simon Glass222f25f2014-12-29 19:32:26 -0700187 /* request linear framebuffer mode and don't clear display */
188 regs->e.ebx |= (1 << 14) | (1 << 15);
Simon Glass4c59f952014-11-14 20:56:40 -0700189 BE_int86(0x10, regs, regs);
Simon Glass222f25f2014-12-29 19:32:26 -0700190 if (regs->e.eax != 0x4f) {
191 debug("VESA_SET_MODE: error %x\n", regs->e.eax);
192 return -ENOSYS;
193 }
Simon Glass4c59f952014-11-14 20:56:40 -0700194
Simon Glass222f25f2014-12-29 19:32:26 -0700195 memset(buffer, '\0', sizeof(struct vbe_mode_info));
196 debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
Simon Glass4c59f952014-11-14 20:56:40 -0700197 regs->e.eax = VESA_GET_MODE_INFO;
Simon Glass4c59f952014-11-14 20:56:40 -0700198 regs->e.ecx = vesa_mode;
Simon Glass4c59f952014-11-14 20:56:40 -0700199 regs->e.esi = buffer_seg;
200 regs->e.edi = buffer_adr;
201 BE_int86(0x10, regs, regs);
Simon Glass222f25f2014-12-29 19:32:26 -0700202 if (regs->e.eax != 0x4f) {
203 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
204 return -ENOSYS;
205 }
Simon Glass4c59f952014-11-14 20:56:40 -0700206
Simon Glass222f25f2014-12-29 19:32:26 -0700207 memcpy(mode_info->mode_info_block, buffer,
208 sizeof(struct vesa_mode_info));
209 mode_info->valid = true;
210 mode_info->video_mode = vesa_mode;
211 vm = &mode_info->vesa;
212 vm->x_resolution = le16_to_cpu(vm->x_resolution);
213 vm->y_resolution = le16_to_cpu(vm->y_resolution);
214 vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline);
215 vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr);
216 vm->mode_attributes = le16_to_cpu(vm->mode_attributes);
217 debug("VBE: Init complete\n");
218
219 return 0;
Simon Glass4c59f952014-11-14 20:56:40 -0700220}
Bin Mengca5eb0c2018-04-11 22:02:15 -0700221#endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */
Simon Glass4c59f952014-11-14 20:56:40 -0700222
Jason Jinece92f82007-07-06 08:34:56 +0800223/****************************************************************************
224PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200225pcidev - PCI device info for the video card on the bus to boot
Simon Glass4c59f952014-11-14 20:56:40 -0700226vga_info - BIOS emulator VGA info structure
Jason Jinece92f82007-07-06 08:34:56 +0800227
228REMARKS:
229This function executes the BIOS POST code on the controller. We assume that
230at this stage the controller has its I/O and memory space enabled and
231that all other controllers are in a disabled state.
232****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700233#ifdef CONFIG_DM_PCI
234static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info,
235 int vesa_mode, struct vbe_mode_info *mode_info)
236#else
Simon Glass4c59f952014-11-14 20:56:40 -0700237static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
238 int vesa_mode, struct vbe_mode_info *mode_info)
Simon Glass72826722016-01-17 16:11:09 -0700239#endif
Jason Jinece92f82007-07-06 08:34:56 +0800240{
241 RMREGS regs;
242 RMSREGS sregs;
Simon Glass72826722016-01-17 16:11:09 -0700243#ifdef CONFIG_DM_PCI
244 pci_dev_t bdf;
245#endif
Jason Jinece92f82007-07-06 08:34:56 +0800246
247 /* Determine the value to store in AX for BIOS POST. Per the PCI specs,
248 AH must contain the bus and AL must contain the devfn, encoded as
249 (dev << 3) | fn
250 */
251 memset(&regs, 0, sizeof(regs));
252 memset(&sregs, 0, sizeof(sregs));
Simon Glass72826722016-01-17 16:11:09 -0700253#ifdef CONFIG_DM_PCI
254 bdf = dm_pci_get_bdf(pcidev);
255 regs.x.ax = (int)PCI_BUS(bdf) << 8 |
256 (int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf);
257#else
Jason Jinece92f82007-07-06 08:34:56 +0800258 regs.x.ax = ((int)PCI_BUS(pcidev) << 8) |
259 ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev);
Simon Glass72826722016-01-17 16:11:09 -0700260#endif
Jason Jinece92f82007-07-06 08:34:56 +0800261 /*Setup the X86 emulator for the VGA BIOS*/
Simon Glass4c59f952014-11-14 20:56:40 -0700262 BE_setVGA(vga_info);
Jason Jinece92f82007-07-06 08:34:56 +0800263
264 /*Execute the BIOS POST code*/
265 BE_callRealMode(0xC000, 0x0003, &regs, &sregs);
266
267 /*Cleanup and exit*/
Simon Glass4c59f952014-11-14 20:56:40 -0700268 BE_getVGA(vga_info);
269
Bin Mengca5eb0c2018-04-11 22:02:15 -0700270#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
Simon Glass222f25f2014-12-29 19:32:26 -0700271 /* Useful for debugging */
272 if (0)
273 atibios_debug_mode(vga_info, &regs, vesa_mode, mode_info);
Simon Glass4c59f952014-11-14 20:56:40 -0700274 if (vesa_mode != -1)
275 atibios_set_vesa_mode(&regs, vesa_mode, mode_info);
Bin Mengca5eb0c2018-04-11 22:02:15 -0700276#endif
Jason Jinece92f82007-07-06 08:34:56 +0800277}
278
279/****************************************************************************
280PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200281pcidev - PCI device info for the video card on the bus
282bar - Place to return the base address register offset to use
Jason Jinece92f82007-07-06 08:34:56 +0800283
284RETURNS:
285The address to use to map the secondary BIOS (AGP devices)
286
287REMARKS:
288Searches all the PCI base address registers for the device looking for a
289memory mapping that is large enough to hold our ROM BIOS. We usually end up
290finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
291to map the BIOS for the device into. We use a mapping that is already
292assigned to the device to ensure the memory range will be passed through
293by any PCI->PCI or AGP->PCI bridge that may be present.
294
295NOTE: Usually this function is only used for AGP devices, but it may be
296 used for PCI devices that have already been POST'ed and the BIOS
297 ROM base address has been zero'ed out.
298
299NOTE: This function leaves the original memory aperture disabled by leaving
300 it programmed to all 1's. It must be restored to the correct value
301 later.
302****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700303#ifdef CONFIG_DM_PCI
304static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar)
305#else
Jason Jinece92f82007-07-06 08:34:56 +0800306static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar)
Simon Glass72826722016-01-17 16:11:09 -0700307#endif
Jason Jinece92f82007-07-06 08:34:56 +0800308{
309 u32 base, size;
310
311 for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
Simon Glass72826722016-01-17 16:11:09 -0700312#ifdef CONFIG_DM_PCI
313 dm_pci_read_config32(pcidev, *bar, &base);
314#else
Jason Jinece92f82007-07-06 08:34:56 +0800315 pci_read_config_dword(pcidev, *bar, &base);
Simon Glass72826722016-01-17 16:11:09 -0700316#endif
Jason Jinece92f82007-07-06 08:34:56 +0800317 if (!(base & 0x1)) {
Simon Glass72826722016-01-17 16:11:09 -0700318#ifdef CONFIG_DM_PCI
319 dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF);
320 dm_pci_read_config32(pcidev, *bar, &size);
321#else
Jason Jinece92f82007-07-06 08:34:56 +0800322 pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF);
323 pci_read_config_dword(pcidev, *bar, &size);
Simon Glass72826722016-01-17 16:11:09 -0700324#endif
Jason Jinece92f82007-07-06 08:34:56 +0800325 size = ~(size & ~0xFF) + 1;
326 if (size >= MAX_BIOSLEN)
327 return base & ~0xFF;
328 }
329 }
330 return 0;
331}
332
333/****************************************************************************
334REMARKS:
335Some non-x86 Linux kernels map PCI relocateable I/O to values that
336are above 64K, which will not work with the BIOS image that requires
337the offset for the I/O ports to be a maximum of 16-bits. Ideally
338someone should fix the kernel to map the I/O ports for VGA compatible
339devices to a different location (or just all I/O ports since it is
340unlikely you can have enough devices in the machine to use up all
34164K of the I/O space - a total of more than 256 cards would be
342necessary).
343
344Anyway to fix this we change all I/O mapped base registers and
345chop off the top bits.
346****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700347#ifdef CONFIG_DM_PCI
348static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base)
349#else
Jason Jinece92f82007-07-06 08:34:56 +0800350static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
Simon Glass72826722016-01-17 16:11:09 -0700351#endif
Jason Jinece92f82007-07-06 08:34:56 +0800352{
353 if ((*base & 0x1) && (*base > 0xFFFE)) {
354 *base &= 0xFFFF;
Simon Glass72826722016-01-17 16:11:09 -0700355#ifdef CONFIG_DM_PCI
356 dm_pci_write_config32(pcidev, reg, *base);
357#else
Jason Jinece92f82007-07-06 08:34:56 +0800358 pci_write_config_dword(pcidev, reg, *base);
Simon Glass72826722016-01-17 16:11:09 -0700359#endif
Jason Jinece92f82007-07-06 08:34:56 +0800360
361 }
362}
363
364/****************************************************************************
365PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200366pcidev - PCI device info for the video card on the bus
Jason Jinece92f82007-07-06 08:34:56 +0800367
368RETURNS:
369Pointers to the mapped BIOS image
370
371REMARKS:
372Maps a pointer to the BIOS image on the graphics card on the PCI bus.
373****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700374#ifdef CONFIG_DM_PCI
375void *PCI_mapBIOSImage(struct udevice *pcidev)
376#else
Jason Jinece92f82007-07-06 08:34:56 +0800377void *PCI_mapBIOSImage(pci_dev_t pcidev)
Simon Glass72826722016-01-17 16:11:09 -0700378#endif
Jason Jinece92f82007-07-06 08:34:56 +0800379{
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500380 u32 BIOSImageBus;
Jason Jinece92f82007-07-06 08:34:56 +0800381 int BIOSImageBAR;
382 u8 *BIOSImage;
383
384 /*Save PCI BAR registers that might get changed*/
Simon Glass72826722016-01-17 16:11:09 -0700385#ifdef CONFIG_DM_PCI
386 dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
387 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
388 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
389 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
390 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
391#else
Jason Jinece92f82007-07-06 08:34:56 +0800392 pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
393 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
394 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
395 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
396 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
Simon Glass72826722016-01-17 16:11:09 -0700397#endif
Jason Jinece92f82007-07-06 08:34:56 +0800398
399 /*Fix up I/O base registers to less than 64K */
400 if(saveBaseAddress14 != 0)
401 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
402 else
403 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
404
405 /* Some cards have problems that stop us from being able to read the
406 BIOS image from the ROM BAR. To fix this we have to do some chipset
407 specific programming for different cards to solve this problem.
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200408 */
Jason Jinece92f82007-07-06 08:34:56 +0800409
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500410 BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
411 if (BIOSImageBus == 0) {
Jason Jinece92f82007-07-06 08:34:56 +0800412 printf("Find bios addr error\n");
413 return NULL;
414 }
415
Simon Glass72826722016-01-17 16:11:09 -0700416#ifdef CONFIG_DM_PCI
417 BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus,
418 PCI_REGION_MEM, 0, MAP_NOCACHE);
419
420 /*Change the PCI BAR registers to map it onto the bus.*/
421 dm_pci_write_config32(pcidev, BIOSImageBAR, 0);
422 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
423#else
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500424 BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
425 PCI_REGION_MEM, 0, MAP_NOCACHE);
Jason Jinece92f82007-07-06 08:34:56 +0800426
427 /*Change the PCI BAR registers to map it onto the bus.*/
428 pci_write_config_dword(pcidev, BIOSImageBAR, 0);
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500429 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
Simon Glass72826722016-01-17 16:11:09 -0700430#endif
Jason Jinece92f82007-07-06 08:34:56 +0800431 udelay(1);
432
433 /*Check that the BIOS image is valid. If not fail, or return the
434 compiled in BIOS image if that option was enabled
435 */
436 if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) {
437 return NULL;
438 }
439
440 return BIOSImage;
441}
442
443/****************************************************************************
444PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200445pcidev - PCI device info for the video card on the bus
Jason Jinece92f82007-07-06 08:34:56 +0800446
447REMARKS:
448Unmaps the BIOS image for the device and restores framebuffer mappings
449****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700450#ifdef CONFIG_DM_PCI
451void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
452{
453 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
454 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
455 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
456 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
457 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
458}
459#else
Jason Jinece92f82007-07-06 08:34:56 +0800460void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
461{
462 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
463 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
464 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
465 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
466 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
467}
Simon Glass72826722016-01-17 16:11:09 -0700468#endif
Jason Jinece92f82007-07-06 08:34:56 +0800469
470/****************************************************************************
471PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200472pcidev - PCI device info for the video card on the bus to boot
Jason Jinece92f82007-07-06 08:34:56 +0800473VGAInfo - BIOS emulator VGA info structure
474
475RETURNS:
York Sun472d5462013-04-01 11:29:11 -0700476true if successfully initialised, false if not.
Jason Jinece92f82007-07-06 08:34:56 +0800477
478REMARKS:
479Loads and POST's the display controllers BIOS, directly from the BIOS
480image we can extract over the PCI bus.
481****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700482#ifdef CONFIG_DM_PCI
483static int PCI_postController(struct udevice *pcidev, uchar *bios_rom,
484 int bios_len, BE_VGAInfo *vga_info,
485 int vesa_mode, struct vbe_mode_info *mode_info)
486#else
Simon Glass4c59f952014-11-14 20:56:40 -0700487static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
488 BE_VGAInfo *vga_info, int vesa_mode,
489 struct vbe_mode_info *mode_info)
Simon Glass72826722016-01-17 16:11:09 -0700490#endif
Jason Jinece92f82007-07-06 08:34:56 +0800491{
Simon Glass4c59f952014-11-14 20:56:40 -0700492 u32 bios_image_len;
493 uchar *mapped_bios;
494 uchar *copy_of_bios;
Simon Glass72826722016-01-17 16:11:09 -0700495#ifdef CONFIG_DM_PCI
496 pci_dev_t bdf;
497#endif
Jason Jinece92f82007-07-06 08:34:56 +0800498
Simon Glass4c59f952014-11-14 20:56:40 -0700499 if (bios_rom) {
500 copy_of_bios = bios_rom;
501 bios_image_len = bios_len;
502 } else {
503 /*
504 * Allocate memory to store copy of BIOS from display
505 * controller
506 */
507 mapped_bios = PCI_mapBIOSImage(pcidev);
508 if (mapped_bios == NULL) {
509 printf("videoboot: Video ROM failed to map!\n");
510 return false;
511 }
512
513 bios_image_len = mapped_bios[2] * 512;
514
515 copy_of_bios = malloc(bios_image_len);
516 if (copy_of_bios == NULL) {
517 printf("videoboot: Out of memory!\n");
518 return false;
519 }
520 memcpy(copy_of_bios, mapped_bios, bios_image_len);
521 PCI_unmapBIOSImage(pcidev, mapped_bios);
Jason Jinece92f82007-07-06 08:34:56 +0800522 }
523
Simon Glass4c59f952014-11-14 20:56:40 -0700524 /*Save information in vga_info structure*/
Simon Glass72826722016-01-17 16:11:09 -0700525#ifdef CONFIG_DM_PCI
526 bdf = dm_pci_get_bdf(pcidev);
527 vga_info->function = PCI_FUNC(bdf);
528 vga_info->device = PCI_DEV(bdf);
529 vga_info->bus = PCI_BUS(bdf);
530#else
Simon Glass4c59f952014-11-14 20:56:40 -0700531 vga_info->function = PCI_FUNC(pcidev);
532 vga_info->device = PCI_DEV(pcidev);
533 vga_info->bus = PCI_BUS(pcidev);
Simon Glass72826722016-01-17 16:11:09 -0700534#endif
Simon Glass4c59f952014-11-14 20:56:40 -0700535 vga_info->pcidev = pcidev;
536 vga_info->BIOSImage = copy_of_bios;
537 vga_info->BIOSImageLen = bios_image_len;
Jason Jinece92f82007-07-06 08:34:56 +0800538
539 /*Now execute the BIOS POST for the device*/
Simon Glass4c59f952014-11-14 20:56:40 -0700540 if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) {
Jason Jinece92f82007-07-06 08:34:56 +0800541 printf("videoboot: Video ROM image is invalid!\n");
542 return false;
543 }
544
Simon Glass4c59f952014-11-14 20:56:40 -0700545 PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);
Jason Jinece92f82007-07-06 08:34:56 +0800546
547 /*Reset the size of the BIOS image to the final size*/
Simon Glass4c59f952014-11-14 20:56:40 -0700548 vga_info->BIOSImageLen = copy_of_bios[2] * 512;
Jason Jinece92f82007-07-06 08:34:56 +0800549 return true;
550}
551
Simon Glass72826722016-01-17 16:11:09 -0700552#ifdef CONFIG_DM_PCI
553int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop)
554#else
Simon Glass4c59f952014-11-14 20:56:40 -0700555int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop)
Simon Glass72826722016-01-17 16:11:09 -0700556#endif
Simon Glass4c59f952014-11-14 20:56:40 -0700557{
558 BE_VGAInfo *VGAInfo;
Simon Glass72826722016-01-17 16:11:09 -0700559#ifdef CONFIG_DM_PCI
560 pci_dev_t bdf = dm_pci_get_bdf(pcidev);
Simon Glass4c59f952014-11-14 20:56:40 -0700561
562 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
Simon Glass72826722016-01-17 16:11:09 -0700563 PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf));
564#else
565 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
566 PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev));
567#endif
Simon Glass4c59f952014-11-14 20:56:40 -0700568 /*Initialise the x86 BIOS emulator*/
569 if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
570 printf("videoboot: Out of memory!\n");
571 return -ENOMEM;
572 }
573 memset(VGAInfo, 0, sizeof(*VGAInfo));
574 BE_init(0, 65536, VGAInfo, 0);
575 *vga_infop = VGAInfo;
576
577 return 0;
578}
579
580void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
581{
582 X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
583}
584
Simon Glass72826722016-01-17 16:11:09 -0700585#ifdef CONFIG_DM_PCI
586int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len,
587 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
588 struct vbe_mode_info *mode_info)
589#else
Simon Glass4c59f952014-11-14 20:56:40 -0700590int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
591 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
592 struct vbe_mode_info *mode_info)
Simon Glass72826722016-01-17 16:11:09 -0700593#endif
Simon Glass4c59f952014-11-14 20:56:40 -0700594{
595 /*Post all the display controller BIOS'es*/
596 if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
597 vesa_mode, mode_info))
598 return -EINVAL;
599
600 /*
601 * Cleanup and exit the emulator if requested. If the BIOS emulator
602 * is needed after booting the card, we will not call BE_exit and
603 * leave it enabled for further use (ie: VESA driver etc).
604 */
605 if (clean_up) {
606 BE_exit();
Bin Meng6e7b5f22015-04-24 15:48:05 +0800607 if (vga_info->BIOSImage &&
Simon Glass2cd11a22016-09-25 21:33:06 -0600608 (ulong)(vga_info->BIOSImage) != 0xc0000)
Simon Glass4c59f952014-11-14 20:56:40 -0700609 free(vga_info->BIOSImage);
610 free(vga_info);
Simon Glass4c59f952014-11-14 20:56:40 -0700611 }
612
613 return 0;
614}
615
Jason Jinece92f82007-07-06 08:34:56 +0800616/****************************************************************************
617PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200618pcidev - PCI device info for the video card on the bus to boot
Jason Jinece92f82007-07-06 08:34:56 +0800619pVGAInfo - Place to return VGA info structure is requested
York Sun472d5462013-04-01 11:29:11 -0700620cleanUp - true to clean up on exit, false to leave emulator active
Jason Jinece92f82007-07-06 08:34:56 +0800621
622REMARKS:
623Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
624and the X86 BIOS emulator module.
625****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700626#ifdef CONFIG_DM_PCI
627int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,
628 int clean_up)
629#else
Simon Glass4c59f952014-11-14 20:56:40 -0700630int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up)
Simon Glass72826722016-01-17 16:11:09 -0700631#endif
Jason Jinece92f82007-07-06 08:34:56 +0800632{
633 BE_VGAInfo *VGAInfo;
Simon Glass4c59f952014-11-14 20:56:40 -0700634 int ret;
Jason Jinece92f82007-07-06 08:34:56 +0800635
Simon Glass4c59f952014-11-14 20:56:40 -0700636 ret = biosemu_setup(pcidev, &VGAInfo);
637 if (ret)
Jason Jinece92f82007-07-06 08:34:56 +0800638 return false;
Simon Glass4c59f952014-11-14 20:56:40 -0700639 ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
640 if (ret)
Ed Swarthout9624f6d2010-03-31 09:54:28 -0500641 return false;
Jason Jinece92f82007-07-06 08:34:56 +0800642
Simon Glass4c59f952014-11-14 20:56:40 -0700643 /* Return VGA info pointer if the caller requested it*/
Jason Jinece92f82007-07-06 08:34:56 +0800644 if (pVGAInfo)
645 *pVGAInfo = VGAInfo;
Simon Glass4c59f952014-11-14 20:56:40 -0700646
Jason Jinece92f82007-07-06 08:34:56 +0800647 return true;
648}