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wdenk5c952cf2004-10-10 21:27:30 +00001/*
2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
3 * Scott McNutt <smcnutt@psyent.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*------------------------------------------------------------------------
28 * BOARD/CPU
29 *----------------------------------------------------------------------*/
30#define CONFIG_PCI5441 1 /* PCI-5441 board */
31#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
32
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020033#define CONFIG_SYS_RESET_ADDR 0x00000000 /* Hard-reset address */
34#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
35#define CONFIG_SYS_NIOS_SYSID_BASE 0x00920828 /* System id address */
wdenk5c952cf2004-10-10 21:27:30 +000036#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
37
38/*------------------------------------------------------------------------
39 * CACHE -- the following will support II/s and II/f. The II/s does not
40 * have dcache, so the cache instructions will behave as NOPs.
41 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020042#define CONFIG_SYS_ICACHE_SIZE 4096 /* 4 KByte total */
43#define CONFIG_SYS_ICACHELINE_SIZE 32 /* 32 bytes/line */
44#define CONFIG_SYS_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
45#define CONFIG_SYS_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
wdenk5c952cf2004-10-10 21:27:30 +000046
47/*------------------------------------------------------------------------
48 * MEMORY BASE ADDRESSES
49 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050#define CONFIG_SYS_FLASH_BASE 0x00000000 /* FLASH base addr */
51#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */
52#define CONFIG_SYS_SDRAM_BASE 0x01000000 /* SDRAM base addr */
53#define CONFIG_SYS_SDRAM_SIZE 0x01000000 /* 16 MByte */
wdenk5c952cf2004-10-10 21:27:30 +000054
55/*------------------------------------------------------------------------
56 * MEMORY ORGANIZATION
Wolfgang Denk53677ef2008-05-20 16:00:29 +020057 * -Monitor at top.
58 * -The heap is placed below the monitor.
59 * -Global data is placed below the heap.
60 * -The stack is placed below global data (&grows down).
wdenk5c952cf2004-10-10 21:27:30 +000061 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020062#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* Reserve 128k */
63#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/
64#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
wdenk5c952cf2004-10-10 21:27:30 +000065
Wolfgang Denk14d0a022010-10-07 21:51:12 +020066#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
68#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
69#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
wdenk5c952cf2004-10-10 21:27:30 +000070
71/*------------------------------------------------------------------------
72 * FLASH (AM29LV065D)
73 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020074#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */
75#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */
76#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
77#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
78#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size */
wdenk5c952cf2004-10-10 21:27:30 +000079
80/*------------------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020081 * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
82 * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the
wdenk5c952cf2004-10-10 21:27:30 +000083 * reset address, no? This will keep the environment in user region
84 * of flash. NOTE: the monitor length must be multiple of sector size
85 * (which is common practice).
86 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020087#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020088#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
wdenk5c952cf2004-10-10 21:27:30 +000089#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020090#define CONFIG_ENV_ADDR (CONFIG_SYS_RESET_ADDR + CONFIG_SYS_MONITOR_LEN)
wdenk5c952cf2004-10-10 21:27:30 +000091
92/*------------------------------------------------------------------------
93 * CONSOLE
94 *----------------------------------------------------------------------*/
Scott McNuttc9d4f462010-03-19 19:03:28 -040095#define CONFIG_ALTERA_UART 1 /* Use altera uart */
96#if defined(CONFIG_ALTERA_JTAG_UART)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020097#define CONFIG_SYS_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr */
wdenk5c952cf2004-10-10 21:27:30 +000098#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020099#define CONFIG_SYS_NIOS_CONSOLE 0x009208a0 /* UART base addr */
wdenk5c952cf2004-10-10 21:27:30 +0000100#endif
101
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200102#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
wdenk5c952cf2004-10-10 21:27:30 +0000103#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200104#define CONFIG_SYS_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
wdenk5c952cf2004-10-10 21:27:30 +0000105
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
wdenk5c952cf2004-10-10 21:27:30 +0000107
108/*------------------------------------------------------------------------
109 * DEBUG
110 *----------------------------------------------------------------------*/
111#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
112
113/*------------------------------------------------------------------------
114 * TIMEBASE --
115 *
116 * The high res timer defaults to 1 msec. Since it includes the period
Scott McNutt3a89a912010-03-30 20:23:04 -0400117 * registers, the interrupt frequency can be reduced using TMRCNT.
118 * If the default period is acceptable, TMRCNT can be left undefined.
119 * TMRMS represents the desired mecs per tick (msecs per interrupt).
wdenk5c952cf2004-10-10 21:27:30 +0000120 *----------------------------------------------------------------------*/
Scott McNutt3a89a912010-03-30 20:23:04 -0400121#define CONFIG_SYS_HZ 1000 /* Always 1000 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200122#define CONFIG_SYS_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */
Scott McNutt3a89a912010-03-30 20:23:04 -0400123#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */
124#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/
125#define CONFIG_SYS_NIOS_TMRCNT \
126 (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
wdenk5c952cf2004-10-10 21:27:30 +0000127
Jon Loeligeracf02692007-07-08 14:49:44 -0500128
129/*
Jon Loeligera1aa0bb2007-07-10 09:22:23 -0500130 * BOOTP options
131 */
132#define CONFIG_BOOTP_BOOTFILESIZE
133#define CONFIG_BOOTP_BOOTPATH
134#define CONFIG_BOOTP_GATEWAY
135#define CONFIG_BOOTP_HOSTNAME
136
137
138/*
Jon Loeligeracf02692007-07-08 14:49:44 -0500139 * Command line configuration.
140 */
141#define CONFIG_CMD_BDI
142#define CONFIG_CMD_ECHO
Mike Frysingerbdab39d2009-01-28 19:08:14 -0500143#define CONFIG_CMD_SAVEENV
Jon Loeligeracf02692007-07-08 14:49:44 -0500144#define CONFIG_CMD_FLASH
145#define CONFIG_CMD_IMI
146#define CONFIG_CMD_IRQ
147#define CONFIG_CMD_LOADS
148#define CONFIG_CMD_LOADB
149#define CONFIG_CMD_MEMORY
150#define CONFIG_CMD_MISC
151#define CONFIG_CMD_RUN
152#define CONFIG_CMD_SAVES
153
wdenk5c952cf2004-10-10 21:27:30 +0000154
155/*------------------------------------------------------------------------
156 * MISC
157 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_SYS_LONGHELP /* Provide extended help*/
159#define CONFIG_SYS_PROMPT "==> " /* Command prompt */
160#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */
161#define CONFIG_SYS_MAXARGS 16 /* Max command args */
162#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot arg buf size */
163#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buf size */
164#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* Default load address */
165#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* Start addr for test */
166#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_INIT_SP - 0x00020000
wdenk5c952cf2004-10-10 21:27:30 +0000167
168#endif /* __CONFIG_H */