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Simon Glass2444dae2015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
3config ROCKCHIP_RK3288
4 bool "Support Rockchip RK3288"
5 help
6 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
7 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
8 video interfaces supporting HDMI and eDP, several DDR3 options
9 and video codec support. Peripherals include Gigabit Ethernet,
10 USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs.
11
huang linbe1d5e02015-11-17 14:20:27 +080012config ROCKCHIP_RK3036
13 bool "Support Rockchip RK3036"
14 help
15 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
16 including NEON and GPU, Mali-400 graphics, several DDR3 options
17 and video codec support. Peripherals include Gigabit Ethernet,
18 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
19
Jeffy Chen6ae58602015-11-17 14:20:29 +080020config ROCKCHIP_SPL_HDR
21 string "Header of rockchip's spl loader"
22 help
23 Rockchip's bootrom requires the spl loader to start with a 4-bytes
24 header. The content of this header depends on the chip type.
25
26config ROCKCHIP_MAX_SPL_SIZE
27 hex "Max size of rockchip's spl loader"
28 help
29 Different chip may have different sram size. And if we want to jump
30 back to the bootrom after spl, we may need to reserve some sram space
31 for the bootrom.
32 The max spl loader size should be sram size minus reserved
33 size(if needed)
34
Simon Glass2444dae2015-08-30 16:55:38 -060035config SYS_MALLOC_F
36 default y
37
Simon Glass2444dae2015-08-30 16:55:38 -060038config SPL_DM
39 default y
40
41config DM_SERIAL
42 default y
43
44config DM_SPI
45 default y
46
47config DM_SPI_FLASH
48 default y
49
50config DM_I2C
51 default y
52
53config DM_GPIO
54 default y
55
Simon Glass2444dae2015-08-30 16:55:38 -060056source "arch/arm/mach-rockchip/rk3288/Kconfig"
huang linbe1d5e02015-11-17 14:20:27 +080057source "arch/arm/mach-rockchip/rk3036/Kconfig"
Simon Glass2444dae2015-08-30 16:55:38 -060058endif