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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/renesas,etheravb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Ethernet AVB
8
9maintainers:
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
11
12properties:
13 compatible:
14 oneOf:
15 - items:
16 - enum:
17 - renesas,etheravb-r8a7742 # RZ/G1H
18 - renesas,etheravb-r8a7743 # RZ/G1M
19 - renesas,etheravb-r8a7744 # RZ/G1N
20 - renesas,etheravb-r8a7745 # RZ/G1E
21 - renesas,etheravb-r8a77470 # RZ/G1C
22 - renesas,etheravb-r8a7790 # R-Car H2
23 - renesas,etheravb-r8a7791 # R-Car M2-W
24 - renesas,etheravb-r8a7792 # R-Car V2H
25 - renesas,etheravb-r8a7793 # R-Car M2-N
26 - renesas,etheravb-r8a7794 # R-Car E2
27 - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1
28
29 - items:
30 - enum:
31 - renesas,etheravb-r8a774a1 # RZ/G2M
32 - renesas,etheravb-r8a774b1 # RZ/G2N
33 - renesas,etheravb-r8a774c0 # RZ/G2E
34 - renesas,etheravb-r8a774e1 # RZ/G2H
35 - renesas,etheravb-r8a7795 # R-Car H3
36 - renesas,etheravb-r8a7796 # R-Car M3-W
37 - renesas,etheravb-r8a77961 # R-Car M3-W+
38 - renesas,etheravb-r8a77965 # R-Car M3-N
39 - renesas,etheravb-r8a77970 # R-Car V3M
40 - renesas,etheravb-r8a77980 # R-Car V3H
41 - renesas,etheravb-r8a77990 # R-Car E3
42 - renesas,etheravb-r8a77995 # R-Car D3
43 - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2
44
45 - items:
46 - enum:
47 - renesas,etheravb-r8a779a0 # R-Car V3U
48 - renesas,etheravb-r8a779g0 # R-Car V4H
Tom Rini6bb92fc2024-05-20 09:54:58 -060049 - renesas,etheravb-r8a779h0 # R-Car V4M
Tom Rini53633a82024-02-29 12:33:36 -050050 - const: renesas,etheravb-rcar-gen4 # R-Car Gen4
51
52 - items:
53 - enum:
54 - renesas,etheravb-r9a09g011 # RZ/V2M
55 - const: renesas,etheravb-rzv2m # RZ/V2M compatible
56
57 - items:
58 - enum:
Tom Rini93743d22024-04-01 09:08:13 -040059 - renesas,r9a07g043-gbeth # RZ/G2UL and RZ/Five
Tom Rini53633a82024-02-29 12:33:36 -050060 - renesas,r9a07g044-gbeth # RZ/G2{L,LC}
61 - renesas,r9a07g054-gbeth # RZ/V2L
Tom Rini93743d22024-04-01 09:08:13 -040062 - renesas,r9a08g045-gbeth # RZ/G3S
Tom Rini53633a82024-02-29 12:33:36 -050063 - const: renesas,rzg2l-gbeth # RZ/{G2L,G2UL,V2L} family
64
65 reg: true
66
67 interrupts: true
68
69 interrupt-names: true
70
71 clocks: true
72
73 clock-names: true
74
75 iommus:
76 maxItems: 1
77
78 power-domains:
79 maxItems: 1
80
81 resets:
82 maxItems: 1
83
84 phy-mode: true
85
86 phy-handle: true
87
88 '#address-cells':
89 description: Number of address cells for the MDIO bus.
90 const: 1
Tom Rini762f85b2024-07-20 11:15:10 -060091 deprecated: true
Tom Rini53633a82024-02-29 12:33:36 -050092
93 '#size-cells':
94 description: Number of size cells on the MDIO bus.
95 const: 0
Tom Rini762f85b2024-07-20 11:15:10 -060096 deprecated: true
97
98 mdio:
99 $ref: /schemas/net/mdio.yaml#
100 unevaluatedProperties: false
Tom Rini53633a82024-02-29 12:33:36 -0500101
102 renesas,no-ether-link:
103 type: boolean
104 description:
105 Specify when a board does not provide a proper AVB_LINK signal.
106
107 renesas,ether-link-active-low:
108 type: boolean
109 description:
110 Specify when the AVB_LINK signal is active-low instead of normal
111 active-high.
112
113 rx-internal-delay-ps:
114 enum: [0, 1800]
115
116 tx-internal-delay-ps:
117 enum: [0, 2000]
118
Tom Rini762f85b2024-07-20 11:15:10 -0600119# In older bindings there where no mdio child-node to describe the MDIO bus
120# and the PHY. To not fail older bindings accept any node with an address. New
121# users should describe the PHY inside the mdio child-node.
Tom Rini53633a82024-02-29 12:33:36 -0500122patternProperties:
123 "@[0-9a-f]$":
124 type: object
Tom Rini762f85b2024-07-20 11:15:10 -0600125 deprecated: true
Tom Rini53633a82024-02-29 12:33:36 -0500126
127required:
128 - compatible
129 - reg
130 - interrupts
131 - clocks
132 - power-domains
133 - resets
134 - phy-mode
135 - phy-handle
Tom Rini53633a82024-02-29 12:33:36 -0500136
137allOf:
138 - $ref: ethernet-controller.yaml#
139
140 - if:
141 properties:
142 compatible:
143 contains:
144 enum:
145 - renesas,etheravb-rcar-gen2
146 - renesas,etheravb-r8a7795
147 - renesas,etheravb-r8a7796
148 - renesas,etheravb-r8a77961
149 - renesas,etheravb-r8a77965
150 then:
151 properties:
152 reg:
153 items:
154 - description: MAC register block
155 - description: Stream buffer
156 else:
157 properties:
158 reg:
159 items:
160 - description: MAC register block
161
162 - if:
163 properties:
164 compatible:
165 contains:
166 enum:
167 - renesas,etheravb-rcar-gen2
168 - renesas,rzg2l-gbeth
169 then:
170 properties:
171 interrupts:
172 minItems: 1
173 maxItems: 3
174 interrupt-names:
175 minItems: 1
176 items:
177 - const: mux
178 - const: fil
179 - const: arp_ns
180 rx-internal-delay-ps: false
181 else:
182 if:
183 properties:
184 compatible:
185 contains:
186 const: renesas,etheravb-rzv2m
187 then:
188 properties:
189 interrupts:
190 minItems: 29
191 maxItems: 29
192 interrupt-names:
193 items:
194 pattern: '^(ch(1?)[0-9])|ch20|ch21|dia|dib|err_a|err_b|mgmt_a|mgmt_b|line3$'
195 rx-internal-delay-ps: false
196 required:
197 - interrupt-names
198 else:
199 properties:
200 interrupts:
201 minItems: 25
202 maxItems: 25
203 interrupt-names:
204 items:
205 pattern: '^ch[0-9]+$'
206 required:
207 - interrupt-names
208 - rx-internal-delay-ps
209
210 - if:
211 properties:
212 compatible:
213 contains:
214 enum:
215 - renesas,etheravb-r8a774a1
216 - renesas,etheravb-r8a774b1
217 - renesas,etheravb-r8a774e1
218 - renesas,etheravb-r8a7795
219 - renesas,etheravb-r8a7796
220 - renesas,etheravb-r8a77961
221 - renesas,etheravb-r8a77965
222 - renesas,etheravb-r8a77970
223 - renesas,etheravb-r8a77980
224 - renesas,etheravb-rcar-gen4
225 then:
226 required:
227 - tx-internal-delay-ps
228 else:
229 properties:
230 tx-internal-delay-ps: false
231
232 - if:
233 properties:
234 compatible:
235 contains:
236 const: renesas,etheravb-r8a77995
237 then:
238 properties:
239 rx-internal-delay-ps:
240 const: 1800
241
242 - if:
243 properties:
244 compatible:
245 contains:
246 const: renesas,etheravb-r8a77980
247 then:
248 properties:
249 tx-internal-delay-ps:
250 const: 2000
251
252 - if:
253 properties:
254 compatible:
255 contains:
256 const: renesas,rzg2l-gbeth
257 then:
258 properties:
259 clocks:
260 items:
261 - description: Main clock
262 - description: Register access clock
263 - description: Reference clock for RGMII
264 clock-names:
265 items:
266 - const: axi
267 - const: chi
268 - const: refclk
269 else:
270 if:
271 properties:
272 compatible:
273 contains:
274 const: renesas,etheravb-rzv2m
275 then:
276 properties:
277 clocks:
278 items:
279 - description: Main clock
280 - description: Coherent Hub Interface clock
281 - description: gPTP reference clock
282 clock-names:
283 items:
284 - const: axi
285 - const: chi
286 - const: gptp
287 else:
288 properties:
289 clocks:
290 minItems: 1
291 items:
292 - description: AVB functional clock
293 - description: Optional TXC reference clock
294 clock-names:
295 minItems: 1
296 items:
297 - const: fck
298 - const: refclk
299
300additionalProperties: false
301
302examples:
303 - |
304 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
305 #include <dt-bindings/interrupt-controller/arm-gic.h>
306 #include <dt-bindings/power/r8a7795-sysc.h>
307 #include <dt-bindings/gpio/gpio.h>
308 aliases {
309 ethernet0 = &avb;
310 };
311
312 avb: ethernet@e6800000 {
313 compatible = "renesas,etheravb-r8a7795",
314 "renesas,etheravb-rcar-gen3";
315 reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>;
316 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
318 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
319 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
320 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
321 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
322 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
323 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
324 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
325 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
326 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
327 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
328 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
329 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
331 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
332 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
333 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
334 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
335 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
336 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
337 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
338 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
339 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
340 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
341 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6",
342 "ch7", "ch8", "ch9", "ch10", "ch11", "ch12",
343 "ch13", "ch14", "ch15", "ch16", "ch17", "ch18",
344 "ch19", "ch20", "ch21", "ch22", "ch23", "ch24";
345 clocks = <&cpg CPG_MOD 812>;
346 clock-names = "fck";
347 iommus = <&ipmmu_ds0 16>;
348 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
349 resets = <&cpg 812>;
350 phy-mode = "rgmii";
351 phy-handle = <&phy0>;
352 rx-internal-delay-ps = <0>;
353 tx-internal-delay-ps = <2000>;
354 #address-cells = <1>;
355 #size-cells = <0>;
356
357 phy0: ethernet-phy@0 {
358 compatible = "ethernet-phy-id0022.1622",
359 "ethernet-phy-ieee802.3-c22";
360 rxc-skew-ps = <1500>;
361 reg = <0>;
362 interrupt-parent = <&gpio2>;
363 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
364 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
365 };
366 };