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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 6b642aca7f571e777924f50732f530fd94b03bfb / . / src / arm64 / rockchip / rk3568-wolfvision-pf5-io-expander.dtso
blob: ebcaeafc3800d04e885caa4b9a3d9388a61cce7d [file] [log] [blame]
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
2/*
3 * Device tree overlay for the WolfVision PF5 IO Expander board.
4 *
5 * Copyright (C) 2024 WolfVision GmbH.
6 */
7
8/dts-v1/;
9/plugin/;
10
11#include <dt-bindings/clock/rk3568-cru.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/pinctrl/rockchip.h>
15
16&{/} {
17 gmac0_clkin: external-gmac0-clock {
18 compatible = "fixed-clock";
19 clock-frequency = <50000000>;
20 clock-output-names = "gmac0_clkin";
21 #clock-cells = <0>;
22 };
23
24 usb_host_vbus: usb-host-vbus-regulator {
25 compatible = "regulator-fixed";
26 enable-active-high;
27 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&usb_host_vbus_en>;
30 regulator-name = "usb_host_vbus";
31 regulator-min-microvolt = <5000000>;
32 regulator-max-microvolt = <5000000>;
33 vin-supply = <&vcc5v_in>;
34 };
35
36 vcc1v8_eth: vcc1v8-eth-regulator {
37 compatible = "regulator-fixed";
38 enable-active-high;
39 gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
40 pinctrl-names = "default";
41 pinctrl-0 = <&vcc1v8_eth_en>;
42 regulator-always-on;
43 regulator-boot-on;
44 regulator-name = "1v8_eth";
45 regulator-min-microvolt = <1800000>;
46 regulator-max-microvolt = <1800000>;
47 vin-supply = <&vcc3v3_sys>;
48 };
49
50 vcc3v3_eth: vcc3v3-eth-regulator {
51 compatible = "regulator-fixed";
52 enable-active-low;
53 gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
54 pinctrl-names = "default";
55 pinctrl-0 = <&vcc3v3_eth_enn>;
56 regulator-always-on;
57 regulator-boot-on;
58 regulator-name = "3v3_eth";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
61 vin-supply = <&vcc3v3_sys>;
62 };
63};
64
65&gmac0 {
66 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>,
67 <&cru SCLK_GMAC0>;
68 assigned-clock-parents = <&cru SCLK_GMAC0_RMII_SPEED>,
69 <&gmac0_clkin>;
70 clock_in_out = "input";
71 phy-handle = <&dp83826>;
72 phy-mode = "rmii";
73 phy-supply = <&vcc3v3_eth>;
74 pinctrl-names = "default";
75 pinctrl-0 = <&gmac0_miim
76 &gmac0_clkinout
77 &gmac0_rx_er
78 &gmac0_rx_bus2
79 &gmac0_tx_bus2>;
80 status = "okay";
81};
82
83&mdio0 {
84 #address-cells = <1>;
85 #size-cells = <0>;
86
87 dp83826: ethernet-phy@0 {
88 compatible = "ethernet-phy-ieee802.3-c22";
89 reg = <0x0>;
90 interrupt-parent = <&gpio0>;
91 interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&eth_wake_intn &eth_phy_rstn>;
94 reset-assert-us = <1000>;
95 reset-deassert-us = <2000>;
96 reset-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
97 wakeup-source;
98 };
99};
100
101&pinctrl {
102 ethernet {
103 eth_wake_intn: eth-wake-intn-pinctrl {
104 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
105 };
106
107 eth_phy_rstn: eth-phy-rstn-pinctrl {
108 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
109 };
110
111 vcc1v8_eth_en: vcc1v8-eth-en-pinctrl {
112 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
113 };
114
115 vcc3v3_eth_enn: vcc3v3-eth-enn-pinctrl {
116 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
117 };
118 };
119
120 usb {
121 usb_host_vbus_en: usb-host-vbus-en-pinctrl {
122 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
123 };
124 };
125};
126
127&usb_host1_xhci {
128 maximum-speed = "high-speed";
129 phys = <&usb2phy0_host>;
130 phy-names = "usb2-phy";
131 status = "okay";
132};
133
134&usb2phy0_host {
135 phy-supply = <&usb_host_vbus>;
136 status = "okay";
137};