Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> |
| 4 | * |
| 5 | * Overlay for SolidRun AM642 HummingBoard-T to enable PCI-E. |
| 6 | */ |
| 7 | |
| 8 | /dts-v1/; |
| 9 | /plugin/; |
| 10 | |
| 11 | #include <dt-bindings/gpio/gpio.h> |
| 12 | #include <dt-bindings/phy/phy.h> |
| 13 | |
| 14 | #include "k3-serdes.h" |
| 15 | |
| 16 | &pcie0_rc { |
| 17 | pinctrl-names = "default"; |
| 18 | pinctrl-0 = <&pcie0_default_pins>; |
| 19 | reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>; |
| 20 | phys = <&serdes0_link>; |
| 21 | phy-names = "pcie-phy"; |
| 22 | num-lanes = <1>; |
| 23 | status = "okay"; |
| 24 | }; |
| 25 | |
| 26 | &serdes0 { |
| 27 | #address-cells = <1>; |
| 28 | #size-cells = <0>; |
| 29 | |
| 30 | serdes0_link: phy@0 { |
| 31 | reg = <0>; |
| 32 | cdns,num-lanes = <1>; |
| 33 | cdns,phy-type = <PHY_TYPE_PCIE>; |
| 34 | #phy-cells = <0>; |
| 35 | resets = <&serdes_wiz0 1>; |
| 36 | }; |
| 37 | }; |
| 38 | |
| 39 | &serdes_ln_ctrl { |
| 40 | idle-states = <AM64_SERDES0_LANE0_PCIE0>; |
| 41 | }; |
| 42 | |
| 43 | &serdes_mux { |
| 44 | idle-state = <1>; |
| 45 | }; |