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Gabor Juhos5a4dcfa2013-05-22 03:57:37 +00001/*
2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
3 *
Tom Rini0b179982013-07-24 09:34:30 -04004 * SPDX-License-Identifier: GPL-2.0
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +00005 */
6
Paul Burton7a9d1092013-11-09 10:22:08 +00007#ifndef _MALTA_CONFIG_H
8#define _MALTA_CONFIG_H
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +00009
10#include <asm/addrspace.h>
11#include <asm/malta.h>
12
13/*
14 * System configuration
15 */
Paul Burton7a9d1092013-11-09 10:22:08 +000016#define CONFIG_MALTA
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000017
Gabor Juhosab413052013-10-24 14:32:00 +020018#define CONFIG_MEMSIZE_IN_BYTES
19
Gabor Juhosfeaa6062013-05-22 03:57:42 +000020#define CONFIG_PCI
21#define CONFIG_PCI_GT64120
Paul Burtonbaf37f02013-11-08 11:18:50 +000022#define CONFIG_PCI_MSC01
Gabor Juhosfeaa6062013-05-22 03:57:42 +000023#define CONFIG_PCI_PNP
Gabor Juhosf1957492013-05-22 03:57:44 +000024#define CONFIG_PCNET
Paul Burtone0878af2013-11-08 11:18:52 +000025#define CONFIG_PCNET_79C973
26#define PCNET_HAS_PROM
Gabor Juhosfeaa6062013-05-22 03:57:42 +000027
Paul Burton3ced12a2013-11-08 11:18:55 +000028#define CONFIG_MISC_INIT_R
29#define CONFIG_RTC_MC146818
30#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
31
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000032/*
33 * CPU Configuration
34 */
35#define CONFIG_SYS_MHZ 250 /* arbitrary value */
36#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000037
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000038#define CONFIG_SWAP_IO_SPACE
39
40/*
41 * Memory map
42 */
Gabor Juhos10473d02013-11-12 16:47:32 +010043#define CONFIG_SYS_TEXT_BASE 0xbe000000 /* Rom version */
44#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000045
46#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
47#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
48
49#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
50
51#define CONFIG_SYS_LOAD_ADDR 0x81000000
52#define CONFIG_SYS_MEMTEST_START 0x80100000
53#define CONFIG_SYS_MEMTEST_END 0x80800000
54
55#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
56#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
Paul Burton67d47522013-11-26 17:45:28 +000057#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000058
59/*
60 * Console configuration
61 */
62#if defined(CONFIG_SYS_LITTLE_ENDIAN)
Paul Burton7a9d1092013-11-09 10:22:08 +000063#define CONFIG_SYS_PROMPT "maltael # "
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000064#else
Paul Burton7a9d1092013-11-09 10:22:08 +000065#define CONFIG_SYS_PROMPT "malta # "
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000066#endif
67
68#define CONFIG_SYS_CBSIZE 256
69#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
70 sizeof(CONFIG_SYS_PROMPT) + 16)
71#define CONFIG_SYS_MAXARGS 16
72
73#define CONFIG_AUTO_COMPLETE
74#define CONFIG_CMDLINE_EDITING
75
76/*
77 * Serial driver
78 */
79#define CONFIG_BAUDRATE 115200
80
81#define CONFIG_SYS_NS16550
82#define CONFIG_SYS_NS16550_SERIAL
83#define CONFIG_SYS_NS16550_REG_SIZE 1
Paul Burton72117da2013-11-26 17:45:26 +000084#define CONFIG_SYS_NS16550_CLK (115200 * 16)
Paul Burtonbaf37f02013-11-08 11:18:50 +000085#define CONFIG_SYS_NS16550_COM1 CKSEG1ADDR(MALTA_GT_UART0_BASE)
86#define CONFIG_SYS_NS16550_COM2 CKSEG1ADDR(MALTA_MSC01_UART0_BASE)
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000087#define CONFIG_CONS_INDEX 1
88
89/*
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000090 * Flash configuration
91 */
Gabor Juhos52caee02013-05-22 03:57:39 +000092#define CONFIG_SYS_FLASH_BASE (KSEG1 | MALTA_FLASH_BASE)
93#define CONFIG_SYS_MAX_FLASH_BANKS 1
94#define CONFIG_SYS_MAX_FLASH_SECT 128
95#define CONFIG_SYS_FLASH_CFI
96#define CONFIG_FLASH_CFI_DRIVER
97#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000098
99/*
Paul Burtonfba6f452013-11-08 11:18:56 +0000100 * Environment
101 */
102#define CONFIG_ENV_IS_IN_FLASH
103#define CONFIG_ENV_SECT_SIZE 0x20000
104#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
105#define CONFIG_ENV_ADDR \
106 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
107
108/*
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +0000109 * Commands
110 */
111#include <config_cmd_default.h>
112
113#undef CONFIG_CMD_FPGA
114#undef CONFIG_CMD_LOADB
115#undef CONFIG_CMD_LOADS
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +0000116#undef CONFIG_CMD_NFS
117
Paul Burton3ced12a2013-11-08 11:18:55 +0000118#define CONFIG_CMD_DATE
Paul Burtone0878af2013-11-08 11:18:52 +0000119#define CONFIG_CMD_DHCP
Gabor Juhosfeaa6062013-05-22 03:57:42 +0000120#define CONFIG_CMD_PCI
Gabor Juhosf1957492013-05-22 03:57:44 +0000121#define CONFIG_CMD_PING
Gabor Juhosfeaa6062013-05-22 03:57:42 +0000122
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +0000123#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
124
Paul Burton7a9d1092013-11-09 10:22:08 +0000125#endif /* _MALTA_CONFIG_H */