Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/qcom,kpss-gcc.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) |
| 8 | |
| 9 | maintainers: |
| 10 | - Christian Marangi <ansuelsmth@gmail.com> |
| 11 | |
| 12 | description: |
| 13 | Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used |
| 14 | to control L2 mux (in the current implementation) and provide access |
| 15 | to the kpss-gcc registers. |
| 16 | |
| 17 | properties: |
| 18 | compatible: |
| 19 | items: |
| 20 | - enum: |
| 21 | - qcom,kpss-gcc-ipq8064 |
| 22 | - qcom,kpss-gcc-apq8064 |
| 23 | - qcom,kpss-gcc-msm8974 |
| 24 | - qcom,kpss-gcc-msm8960 |
| 25 | - qcom,kpss-gcc-msm8660 |
| 26 | - qcom,kpss-gcc-mdm9615 |
| 27 | - const: qcom,kpss-gcc |
| 28 | - const: syscon |
| 29 | |
| 30 | reg: |
| 31 | maxItems: 1 |
| 32 | |
| 33 | clocks: |
| 34 | minItems: 2 |
| 35 | maxItems: 2 |
| 36 | |
| 37 | clock-names: |
| 38 | items: |
| 39 | - const: pll8_vote |
| 40 | - const: pxo |
| 41 | |
| 42 | '#clock-cells': |
| 43 | const: 0 |
| 44 | |
| 45 | required: |
| 46 | - compatible |
| 47 | - reg |
| 48 | |
| 49 | if: |
| 50 | properties: |
| 51 | compatible: |
| 52 | contains: |
| 53 | enum: |
| 54 | - qcom,kpss-gcc-ipq8064 |
| 55 | - qcom,kpss-gcc-apq8064 |
| 56 | - qcom,kpss-gcc-msm8974 |
| 57 | - qcom,kpss-gcc-msm8960 |
| 58 | then: |
| 59 | required: |
| 60 | - clocks |
| 61 | - clock-names |
| 62 | - '#clock-cells' |
| 63 | else: |
| 64 | properties: |
| 65 | clock: false |
| 66 | clock-names: false |
| 67 | '#clock-cells': false |
| 68 | |
| 69 | additionalProperties: false |
| 70 | |
| 71 | examples: |
| 72 | - | |
| 73 | #include <dt-bindings/clock/qcom,gcc-ipq806x.h> |
| 74 | |
| 75 | clock-controller@2011000 { |
| 76 | compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon"; |
| 77 | reg = <0x2011000 0x1000>; |
| 78 | clocks = <&gcc PLL8_VOTE>, <&pxo_board>; |
| 79 | clock-names = "pll8_vote", "pxo"; |
| 80 | #clock-cells = <0>; |
| 81 | }; |
| 82 | |
| 83 | - | |
| 84 | clock-controller@2011000 { |
| 85 | compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon"; |
| 86 | reg = <0x02011000 0x1000>; |
| 87 | }; |
| 88 | ... |