blob: 09618bb7d872c9f26c2d9cdac69d66364021016c [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6#include "rk3288.dtsi"
7#include <dt-bindings/input/input.h>
8#include <dt-bindings/clock/rockchip,rk808.h>
9
10/ {
11 chosen {
12 stdout-path = "serial2:115200n8";
13 };
14
15 memory {
16 reg = <0x0 0x0 0x0 0x80000000>;
17 device_type = "memory";
18 };
19
20 ext_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <125000000>;
24 clock-output-names = "ext_gmac";
25 };
26
27 gpio-keys {
28 compatible = "gpio-keys";
29 autorepeat;
30
31 pinctrl-names = "default";
32 pinctrl-0 = <&pwrbtn>;
33
34 button {
35 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
36 linux,code = <KEY_POWER>;
37 label = "GPIO Key Power";
38 linux,input-type = <1>;
39 wakeup-source;
40 debounce-interval = <100>;
41 };
42 };
43
44 gpio-leds {
45 compatible = "gpio-leds";
46
47 act_led: led-0 {
48 gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
49 linux,default-trigger = "mmc0";
50 };
51
52 heartbeat_led: led-1 {
53 gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
54 linux,default-trigger = "heartbeat";
55 };
56
57 pwr_led: led-2 {
58 gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
59 linux,default-trigger = "default-on";
60 };
61 };
62
63 sdio_pwrseq: sdio-pwrseq {
64 compatible = "mmc-pwrseq-simple";
65 clocks = <&rk808 RK808_CLKOUT1>;
66 clock-names = "ext_clock";
67 pinctrl-names = "default";
68 pinctrl-0 = <&wifi_enable>;
69 reset-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>,
70 <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
71 };
72
73 sound {
74 compatible = "simple-audio-card";
75 simple-audio-card,format = "i2s";
76 simple-audio-card,name = "rockchip,tinker-codec";
77 simple-audio-card,mclk-fs = <512>;
78
79 simple-audio-card,codec {
80 sound-dai = <&hdmi>;
81 };
82
83 simple-audio-card,cpu {
84 sound-dai = <&i2s>;
85 };
86 };
87
88 vcc_sys: vsys-regulator {
89 compatible = "regulator-fixed";
90 regulator-name = "vcc_sys";
91 regulator-min-microvolt = <5000000>;
92 regulator-max-microvolt = <5000000>;
93 regulator-always-on;
94 regulator-boot-on;
95 };
96
97 vcc_sd: sdmmc-regulator {
98 compatible = "regulator-fixed";
99 gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
100 pinctrl-names = "default";
101 pinctrl-0 = <&sdmmc_pwr>;
102 regulator-name = "vcc_sd";
103 regulator-min-microvolt = <3300000>;
104 regulator-max-microvolt = <3300000>;
105 startup-delay-us = <100000>;
106 vin-supply = <&vcc_io>;
107 };
108};
109
110&cpu0 {
111 cpu0-supply = <&vdd_cpu>;
112};
113
114&cpu_opp_table {
115 opp-1704000000 {
116 opp-hz = /bits/ 64 <1704000000>;
117 opp-microvolt = <1350000>;
118 };
119 opp-1800000000 {
120 opp-hz = /bits/ 64 <1800000000>;
121 opp-microvolt = <1400000>;
122 };
123};
124
125&gmac {
126 assigned-clocks = <&cru SCLK_MAC>;
127 assigned-clock-parents = <&ext_gmac>;
128 clock_in_out = "input";
129 phy-mode = "rgmii";
130 phy-supply = <&vcc33_lan>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&rgmii_pins>;
133 snps,reset-gpio = <&gpio4 7 0>;
134 snps,reset-active-low;
135 snps,reset-delays-us = <0 10000 1000000>;
136 tx_delay = <0x30>;
137 rx_delay = <0x10>;
138 status = "okay";
139};
140
141&gpu {
142 mali-supply = <&vdd_gpu>;
143 status = "okay";
144};
145
146&hdmi {
147 ddc-i2c-bus = <&i2c5>;
148 status = "okay";
149};
150
151&i2c0 {
152 clock-frequency = <400000>;
153 status = "okay";
154
155 rk808: pmic@1b {
156 compatible = "rockchip,rk808";
157 reg = <0x1b>;
158 interrupt-parent = <&gpio0>;
159 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
160 #clock-cells = <1>;
161 clock-output-names = "xin32k", "rk808-clkout2";
162 dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>,
163 <&gpio0 12 GPIO_ACTIVE_HIGH>;
164 pinctrl-names = "default";
165 pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>;
166 rockchip,system-power-controller;
167 wakeup-source;
168
169 vcc1-supply = <&vcc_sys>;
170 vcc2-supply = <&vcc_sys>;
171 vcc3-supply = <&vcc_sys>;
172 vcc4-supply = <&vcc_sys>;
173 vcc6-supply = <&vcc_sys>;
174 vcc7-supply = <&vcc_sys>;
175 vcc8-supply = <&vcc_io>;
176 vcc9-supply = <&vcc_io>;
177 vcc10-supply = <&vcc_io>;
178 vcc11-supply = <&vcc_sys>;
179 vcc12-supply = <&vcc_io>;
180 vddio-supply = <&vcc_io>;
181
182 regulators {
183 vdd_cpu: DCDC_REG1 {
184 regulator-always-on;
185 regulator-boot-on;
186 regulator-min-microvolt = <750000>;
187 regulator-max-microvolt = <1400000>;
188 regulator-name = "vdd_arm";
189 regulator-ramp-delay = <6000>;
190 regulator-state-mem {
191 regulator-off-in-suspend;
192 };
193 };
194
195 vdd_gpu: DCDC_REG2 {
196 regulator-always-on;
197 regulator-boot-on;
198 regulator-min-microvolt = <850000>;
199 regulator-max-microvolt = <1250000>;
200 regulator-name = "vdd_gpu";
201 regulator-ramp-delay = <6000>;
202 regulator-state-mem {
203 regulator-on-in-suspend;
204 regulator-suspend-microvolt = <1000000>;
205 };
206 };
207
208 vcc_ddr: DCDC_REG3 {
209 regulator-always-on;
210 regulator-boot-on;
211 regulator-name = "vcc_ddr";
212 regulator-state-mem {
213 regulator-on-in-suspend;
214 };
215 };
216
217 vcc_io: DCDC_REG4 {
218 regulator-always-on;
219 regulator-boot-on;
220 regulator-min-microvolt = <3300000>;
221 regulator-max-microvolt = <3300000>;
222 regulator-name = "vcc_io";
223 regulator-state-mem {
224 regulator-on-in-suspend;
225 regulator-suspend-microvolt = <3300000>;
226 };
227 };
228
229 vcc18_ldo1: LDO_REG1 {
230 regulator-always-on;
231 regulator-boot-on;
232 regulator-min-microvolt = <1800000>;
233 regulator-max-microvolt = <1800000>;
234 regulator-name = "vcc18_ldo1";
235 regulator-state-mem {
236 regulator-on-in-suspend;
237 regulator-suspend-microvolt = <1800000>;
238 };
239 };
240
241 vcc33_mipi: LDO_REG2 {
242 regulator-always-on;
243 regulator-boot-on;
244 regulator-min-microvolt = <3300000>;
245 regulator-max-microvolt = <3300000>;
246 regulator-name = "vcc33_mipi";
247 regulator-state-mem {
248 regulator-off-in-suspend;
249 };
250 };
251
252 vdd_10: LDO_REG3 {
253 regulator-always-on;
254 regulator-boot-on;
255 regulator-min-microvolt = <1000000>;
256 regulator-max-microvolt = <1000000>;
257 regulator-name = "vdd_10";
258 regulator-state-mem {
259 regulator-on-in-suspend;
260 regulator-suspend-microvolt = <1000000>;
261 };
262 };
263
264 vcc18_codec: LDO_REG4 {
265 regulator-always-on;
266 regulator-boot-on;
267 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <1800000>;
269 regulator-name = "vcc18_codec";
270 regulator-state-mem {
271 regulator-on-in-suspend;
272 regulator-suspend-microvolt = <1800000>;
273 };
274 };
275
276 vccio_sd: LDO_REG5 {
277 regulator-always-on;
278 regulator-boot-on;
279 regulator-min-microvolt = <1800000>;
280 regulator-max-microvolt = <3300000>;
281 regulator-name = "vccio_sd";
282 regulator-state-mem {
283 regulator-on-in-suspend;
284 regulator-suspend-microvolt = <3300000>;
285 };
286 };
287
288 vdd10_lcd: LDO_REG6 {
289 regulator-always-on;
290 regulator-boot-on;
291 regulator-min-microvolt = <1000000>;
292 regulator-max-microvolt = <1000000>;
293 regulator-name = "vdd10_lcd";
294 regulator-state-mem {
295 regulator-on-in-suspend;
296 regulator-suspend-microvolt = <1000000>;
297 };
298 };
299
300 vcc_18: LDO_REG7 {
301 regulator-always-on;
302 regulator-boot-on;
303 regulator-min-microvolt = <1800000>;
304 regulator-max-microvolt = <1800000>;
305 regulator-name = "vcc_18";
306 regulator-state-mem {
307 regulator-on-in-suspend;
308 regulator-suspend-microvolt = <1800000>;
309 };
310 };
311
312 vcc18_lcd: LDO_REG8 {
313 regulator-always-on;
314 regulator-boot-on;
315 regulator-min-microvolt = <1800000>;
316 regulator-max-microvolt = <1800000>;
317 regulator-name = "vcc18_lcd";
318 regulator-state-mem {
319 regulator-on-in-suspend;
320 regulator-suspend-microvolt = <1800000>;
321 };
322 };
323
324 vcc33_sd: SWITCH_REG1 {
325 regulator-always-on;
326 regulator-boot-on;
327 regulator-name = "vcc33_sd";
328 regulator-state-mem {
329 regulator-on-in-suspend;
330 };
331 };
332
333 vcc33_lan: SWITCH_REG2 {
334 regulator-always-on;
335 regulator-boot-on;
336 regulator-name = "vcc33_lan";
337 regulator-state-mem {
338 regulator-on-in-suspend;
339 };
340 };
341 };
342 };
343};
344
345&i2c2 {
346 status = "okay";
347};
348
349&i2c5 {
350 status = "okay";
351};
352
353&i2s {
354 #sound-dai-cells = <0>;
355 status = "okay";
356};
357
358&io_domains {
359 status = "okay";
360
361 sdcard-supply = <&vccio_sd>;
362 wifi-supply = <&vcc_18>;
363};
364
365&pinctrl {
366 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
367 drive-strength = <8>;
368 };
369
370 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
371 bias-pull-up;
372 drive-strength = <8>;
373 };
374
375 backlight {
376 bl_en: bl-en {
377 rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
378 };
379 };
380
381 buttons {
382 pwrbtn: pwrbtn {
383 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
384 };
385 };
386
387 eth_phy {
388 eth_phy_pwr: eth-phy-pwr {
389 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
390 };
391 };
392
393 pmic {
394 pmic_int: pmic-int {
395 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
396 };
397
398 dvs_1: dvs-1 {
399 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
400 };
401
402 dvs_2: dvs-2 {
403 rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
404 };
405 };
406
407 sdmmc {
408 sdmmc_bus4: sdmmc-bus4 {
409 rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_8ma>,
410 <6 RK_PC1 1 &pcfg_pull_up_drv_8ma>,
411 <6 RK_PC2 1 &pcfg_pull_up_drv_8ma>,
412 <6 RK_PC3 1 &pcfg_pull_up_drv_8ma>;
413 };
414
415 sdmmc_clk: sdmmc-clk {
416 rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>;
417 };
418
419 sdmmc_cmd: sdmmc-cmd {
420 rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>;
421 };
422
423 sdmmc_pwr: sdmmc-pwr {
424 rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
425 };
426 };
427
428 usb {
429 host_vbus_drv: host-vbus-drv {
430 rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
431 };
432
433 pwr_3g: pwr-3g {
434 rockchip,pins = <7 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
435 };
436 };
437
438 sdio {
439 wifi_enable: wifi-enable {
440 rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
441 <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
442 };
443 };
444};
445
446&pwm0 {
447 status = "okay";
448};
449
450&saradc {
451 vref-supply = <&vcc18_ldo1>;
452 status = "okay";
453};
454
455&sdmmc {
456 bus-width = <4>;
457 cap-mmc-highspeed;
458 cap-sd-highspeed;
459 broken-cd;
460 disable-wp; /* wp not hooked up */
461 pinctrl-names = "default";
462 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
463 status = "okay";
464 vmmc-supply = <&vcc33_sd>;
465 vqmmc-supply = <&vccio_sd>;
466};
467
468&sdio0 {
469 bus-width = <4>;
470 cap-sd-highspeed;
471 cap-sdio-irq;
472 keep-power-in-suspend;
473 max-frequency = <50000000>;
474 mmc-pwrseq = <&sdio_pwrseq>;
475 non-removable;
476 pinctrl-names = "default";
477 pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>;
478 sd-uhs-sdr12;
479 sd-uhs-sdr25;
480 sd-uhs-sdr50;
481 vmmc-supply = <&vcc_io>;
482 vqmmc-supply = <&vcc_18>;
483 status = "okay";
484};
485
486&tsadc {
487 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
488 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
489 status = "okay";
490};
491
492&uart0 {
493 status = "okay";
494};
495
496&uart1 {
497 status = "okay";
498};
499
500&uart2 {
501 status = "okay";
502};
503
504&uart3 {
505 status = "okay";
506};
507
508&uart4 {
509 status = "okay";
510};
511
512&usbphy {
513 status = "okay";
514};
515
516&usb_host0_ehci {
517 status = "okay";
518};
519
520&usb_host1 {
521 status = "okay";
522};
523
524&usb_otg {
525 status = "okay";
526};
527
528&vopb {
529 status = "okay";
530};
531
532&vopb_mmu {
533 status = "okay";
534};
535
536&vopl {
537 status = "okay";
538};
539
540&vopl_mmu {
541 status = "okay";
542};
543
544&wdt {
545 status = "okay";
546};