Gitiles
Code Review Sign In
gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 6bb92fcf7d2fea2314d616e5e2391a8bf2b0fdfa / . / src / arm64 / qcom / sc8280xp-crd.dts
blob: 41215567b3aed7d4211a8a4c5ab94042d205b422 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11
12#include "sc8280xp.dtsi"
13#include "sc8280xp-pmics.dtsi"
14
15/ {
16 model = "Qualcomm SC8280XP CRD";
17 compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
18
19 aliases {
20 i2c4 = &i2c4;
21 i2c21 = &i2c21;
22 serial0 = &uart17;
23 };
24
25 backlight: backlight {
26 compatible = "pwm-backlight";
27 pwms = <&pmc8280c_lpg 3 1000000>;
28 enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
29 power-supply = <&vreg_edp_bl>;
30
31 pinctrl-names = "default";
32 pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>;
33 };
34
35 chosen {
36 stdout-path = "serial0:115200n8";
37 };
38
39 pmic-glink {
40 compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink";
41
42 #address-cells = <1>;
43 #size-cells = <0>;
44
45 connector@0 {
46 compatible = "usb-c-connector";
47 reg = <0>;
48 power-role = "dual";
49 data-role = "dual";
50
51 ports {
52 #address-cells = <1>;
53 #size-cells = <0>;
54
55 port@0 {
56 reg = <0>;
57
58 pmic_glink_con0_hs: endpoint {
59 remote-endpoint = <&usb_0_role_switch>;
60 };
61 };
62
63 port@1 {
64 reg = <1>;
65
66 pmic_glink_con0_ss: endpoint {
67 remote-endpoint = <&usb_0_qmpphy_out>;
68 };
69 };
70
71 port@2 {
72 reg = <2>;
73
74 pmic_glink_con0_sbu: endpoint {
75 remote-endpoint = <&usb0_sbu_mux>;
76 };
77 };
78 };
79 };
80
81 connector@1 {
82 compatible = "usb-c-connector";
83 reg = <1>;
84 power-role = "dual";
85 data-role = "dual";
86
87 ports {
88 #address-cells = <1>;
89 #size-cells = <0>;
90 port@0 {
91 reg = <0>;
92
93 pmic_glink_con1_hs: endpoint {
94 remote-endpoint = <&usb_1_role_switch>;
95 };
96 };
97
98 port@1 {
99 reg = <1>;
100
101 pmic_glink_con1_ss: endpoint {
102 remote-endpoint = <&usb_1_qmpphy_out>;
103 };
104 };
105
106 port@2 {
107 reg = <2>;
108
109 pmic_glink_con1_sbu: endpoint {
110 remote-endpoint = <&usb1_sbu_mux>;
111 };
112 };
113 };
114 };
115 };
116
117 vreg_edp_3p3: regulator-edp-3p3 {
118 compatible = "regulator-fixed";
119
120 regulator-name = "VREG_EDP_3P3";
121 regulator-min-microvolt = <3300000>;
122 regulator-max-microvolt = <3300000>;
123
124 gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
125 enable-active-high;
126
127 pinctrl-names = "default";
128 pinctrl-0 = <&edp_reg_en>;
129
130 regulator-boot-on;
131 };
132
133 vreg_edp_bl: regulator-edp-bl {
134 compatible = "regulator-fixed";
135
136 regulator-name = "VREG_EDP_BL";
137 regulator-min-microvolt = <3600000>;
138 regulator-max-microvolt = <3600000>;
139
140 gpio = <&pmc8280_1_gpios 9 GPIO_ACTIVE_HIGH>;
141 enable-active-high;
142
143 pinctrl-names = "default";
144 pinctrl-0 = <&edp_bl_reg_en>;
145
146 regulator-boot-on;
147 };
148
149 vreg_nvme: regulator-nvme {
150 compatible = "regulator-fixed";
151
152 regulator-name = "VREG_NVME_3P3";
153 regulator-min-microvolt = <3300000>;
154 regulator-max-microvolt = <3300000>;
155
156 gpio = <&tlmm 135 GPIO_ACTIVE_HIGH>;
157 enable-active-high;
158
159 pinctrl-names = "default";
160 pinctrl-0 = <&nvme_reg_en>;
161 };
162
163 vreg_misc_3p3: regulator-misc-3p3 {
164 compatible = "regulator-fixed";
165
166 regulator-name = "VREG_MISC_3P3";
167 regulator-min-microvolt = <3300000>;
168 regulator-max-microvolt = <3300000>;
169
170 gpio = <&pmc8280_1_gpios 2 GPIO_ACTIVE_HIGH>;
171 enable-active-high;
172
173 pinctrl-names = "default";
174 pinctrl-0 = <&misc_3p3_reg_en>;
175
176 regulator-boot-on;
177 regulator-always-on;
178 };
179
180 vreg_wlan: regulator-wlan {
181 compatible = "regulator-fixed";
182
183 regulator-name = "VPH_PWR_WLAN";
184 regulator-min-microvolt = <3900000>;
185 regulator-max-microvolt = <3900000>;
186
187 gpio = <&pmr735a_gpios 1 GPIO_ACTIVE_HIGH>;
188 enable-active-high;
189
190 pinctrl-names = "default";
191 pinctrl-0 = <&hastings_reg_en>;
192
193 regulator-boot-on;
194 };
195
196 vreg_wwan: regulator-wwan {
197 compatible = "regulator-fixed";
198
199 regulator-name = "SDX_VPH_PWR";
200 regulator-min-microvolt = <3300000>;
201 regulator-max-microvolt = <3300000>;
202
203 gpio = <&pmc8280_2_gpios 1 GPIO_ACTIVE_HIGH>;
204 enable-active-high;
205
206 pinctrl-names = "default";
207 pinctrl-0 = <&wwan_sw_en>;
208
209 regulator-boot-on;
210 };
211
212 reserved-memory {
213 gpu_mem: gpu-mem@8bf00000 {
214 reg = <0 0x8bf00000 0 0x2000>;
215 no-map;
216 };
217
218 linux,cma {
219 compatible = "shared-dma-pool";
220 size = <0x0 0x8000000>;
221 reusable;
222 linux,cma-default;
223 };
224 };
225
226 usb0-sbu-mux {
227 compatible = "pericom,pi3usb102", "gpio-sbu-mux";
228
229 enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
230 select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>;
231
232 pinctrl-names = "default";
233 pinctrl-0 = <&usb0_sbu_default>;
234
235 mode-switch;
236 orientation-switch;
237
238 port {
239 usb0_sbu_mux: endpoint {
240 remote-endpoint = <&pmic_glink_con0_sbu>;
241 };
242 };
243 };
244
245 usb1-sbu-mux {
246 compatible = "pericom,pi3usb102", "gpio-sbu-mux";
247
248 enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
249 select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
250
251 pinctrl-names = "default";
252 pinctrl-0 = <&usb1_sbu_default>;
253
254 mode-switch;
255 orientation-switch;
256
257 port {
258 usb1_sbu_mux: endpoint {
259 remote-endpoint = <&pmic_glink_con1_sbu>;
260 };
261 };
262 };
263};
264
265&apps_rsc {
266 regulators-0 {
267 compatible = "qcom,pm8350-rpmh-regulators";
268 qcom,pmic-id = "b";
269
270 vdd-l3-l5-supply = <&vreg_s11b>;
271
272 vreg_s11b: smps11 {
273 regulator-name = "vreg_s11b";
274 regulator-min-microvolt = <1272000>;
275 regulator-max-microvolt = <1272000>;
276 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
277 };
278
279 vreg_l3b: ldo3 {
280 regulator-name = "vreg_l3b";
281 regulator-min-microvolt = <1200000>;
282 regulator-max-microvolt = <1200000>;
283 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
284 regulator-boot-on;
285 };
286
287 vreg_l4b: ldo4 {
288 regulator-name = "vreg_l4b";
289 regulator-min-microvolt = <912000>;
290 regulator-max-microvolt = <912000>;
291 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
292 };
293
294 vreg_l6b: ldo6 {
295 regulator-name = "vreg_l6b";
296 regulator-min-microvolt = <880000>;
297 regulator-max-microvolt = <880000>;
298 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
299 regulator-boot-on;
300 };
301 };
302
303 regulators-1 {
304 compatible = "qcom,pm8350c-rpmh-regulators";
305 qcom,pmic-id = "c";
306
307 vreg_l1c: ldo1 {
308 regulator-name = "vreg_l1c";
309 regulator-min-microvolt = <1800000>;
310 regulator-max-microvolt = <1800000>;
311 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
312 };
313
314 vreg_l6c: ldo6 {
315 regulator-name = "vreg_l6c";
316 regulator-min-microvolt = <1800000>;
317 regulator-max-microvolt = <2960000>;
318 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
319 };
320
321 vreg_l7c: ldo7 {
322 regulator-name = "vreg_l7c";
323 regulator-min-microvolt = <2504000>;
324 regulator-max-microvolt = <2504000>;
325 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
326 regulator-allow-set-load;
327 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
328 RPMH_REGULATOR_MODE_HPM>;
329 };
330
331 vreg_l9c: ldo9 {
332 regulator-name = "vreg_l9c";
333 regulator-min-microvolt = <2960000>;
334 regulator-max-microvolt = <2960000>;
335 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
336 };
337
338 vreg_l13c: ldo13 {
339 regulator-name = "vreg_l13c";
340 regulator-min-microvolt = <3072000>;
341 regulator-max-microvolt = <3072000>;
342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 };
344 };
345
346 regulators-2 {
347 compatible = "qcom,pm8350-rpmh-regulators";
348 qcom,pmic-id = "d";
349
350 vdd-l1-l4-supply = <&vreg_s11b>;
351
352 vreg_l3d: ldo3 {
353 regulator-name = "vreg_l3d";
354 regulator-min-microvolt = <1200000>;
355 regulator-max-microvolt = <1200000>;
356 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
357 regulator-allow-set-load;
358 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
359 RPMH_REGULATOR_MODE_HPM>;
360 };
361
362 vreg_l4d: ldo4 {
363 regulator-name = "vreg_l4d";
364 regulator-min-microvolt = <1200000>;
365 regulator-max-microvolt = <1200000>;
366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 };
368
369 vreg_l6d: ldo6 {
370 regulator-name = "vreg_l6d";
371 regulator-min-microvolt = <880000>;
372 regulator-max-microvolt = <880000>;
373 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
374 };
375
376 vreg_l7d: ldo7 {
377 regulator-name = "vreg_l7d";
378 regulator-min-microvolt = <3072000>;
379 regulator-max-microvolt = <3072000>;
380 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
381 };
382
383 vreg_l9d: ldo9 {
384 regulator-name = "vreg_l9d";
385 regulator-min-microvolt = <912000>;
386 regulator-max-microvolt = <912000>;
387 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
388 };
389 };
390};
391
392&dispcc0 {
393 status = "okay";
394};
395
396&gpu {
397 status = "okay";
398
399 zap-shader {
400 memory-region = <&gpu_mem>;
401 firmware-name = "qcom/sc8280xp/qcdxkmsuc8280.mbn";
402 };
403};
404
405&mdss0 {
406 status = "okay";
407};
408
409&mdss0_dp0 {
410 status = "okay";
411};
412
413&mdss0_dp0_out {
414 data-lanes = <0 1>;
415 remote-endpoint = <&usb_0_qmpphy_dp_in>;
416};
417
418&mdss0_dp1 {
419 status = "okay";
420};
421
422&mdss0_dp1_out {
423 data-lanes = <0 1>;
424 remote-endpoint = <&usb_1_qmpphy_dp_in>;
425};
426
427&mdss0_dp3 {
428 compatible = "qcom,sc8280xp-edp";
429 /delete-property/ #sound-dai-cells;
430
431 data-lanes = <0 1 2 3>;
432
433 status = "okay";
434
435 aux-bus {
436 panel {
437 compatible = "edp-panel";
438 power-supply = <&vreg_edp_3p3>;
439
440 backlight = <&backlight>;
441
442 port {
443 edp_panel_in: endpoint {
444 remote-endpoint = <&mdss0_dp3_out>;
445 };
446 };
447 };
448 };
449
450 ports {
451 port@1 {
452 reg = <1>;
453 mdss0_dp3_out: endpoint {
454 remote-endpoint = <&edp_panel_in>;
455 };
456 };
457 };
458};
459
460&mdss0_dp3_phy {
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]461 compatible = "qcom,sc8280xp-edp-phy";
462
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]463 vdda-phy-supply = <&vreg_l6b>;
464 vdda-pll-supply = <&vreg_l3b>;
465
466 status = "okay";
467};
468
469&i2c4 {
470 clock-frequency = <400000>;
471
472 pinctrl-names = "default";
473 pinctrl-0 = <&i2c4_default>;
474
475 status = "okay";
476
477 touchscreen@10 {
478 compatible = "hid-over-i2c";
479 reg = <0x10>;
480
481 hid-descr-addr = <0x1>;
482 interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
483 vdd-supply = <&vreg_misc_3p3>;
484
485 pinctrl-names = "default";
486 pinctrl-0 = <&ts0_default>;
487 };
488};
489
490&i2c21 {
491 clock-frequency = <400000>;
492
493 pinctrl-names = "default";
494 pinctrl-0 = <&i2c21_default>;
495
496 status = "okay";
497
498 touchpad@15 {
499 compatible = "hid-over-i2c";
500 reg = <0x15>;
501
502 hid-descr-addr = <0x1>;
503 interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
504 vdd-supply = <&vreg_misc_3p3>;
505
506 pinctrl-names = "default";
507 pinctrl-0 = <&tpad_default>;
508
509 wakeup-source;
510 };
511
512 keyboard@68 {
513 compatible = "hid-over-i2c";
514 reg = <0x68>;
515
516 hid-descr-addr = <0x1>;
517 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
518 vdd-supply = <&vreg_misc_3p3>;
519
520 pinctrl-names = "default";
521 pinctrl-0 = <&kybd_default>;
522
523 wakeup-source;
524 };
525};
526
527&pcie2a {
528 perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
529 wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
530
531 vddpe-3v3-supply = <&vreg_nvme>;
532
533 pinctrl-names = "default";
534 pinctrl-0 = <&pcie2a_default>;
535
536 status = "okay";
537};
538
539&pcie2a_phy {
540 vdda-phy-supply = <&vreg_l6d>;
541 vdda-pll-supply = <&vreg_l4d>;
542
543 status = "okay";
544};
545
546&pcie3a {
547 perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
548 wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
549
550 vddpe-3v3-supply = <&vreg_wwan>;
551
552 pinctrl-names = "default";
553 pinctrl-0 = <&pcie3a_default>;
554
555 status = "okay";
556};
557
558&pcie3a_phy {
559 vdda-phy-supply = <&vreg_l6d>;
560 vdda-pll-supply = <&vreg_l4d>;
561
562 status = "okay";
563};
564
565&pcie4 {
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]566 max-link-speed = <2>;
567
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]568 perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
569 wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
570
571 vddpe-3v3-supply = <&vreg_wlan>;
572
573 pinctrl-names = "default";
574 pinctrl-0 = <&pcie4_default>;
575
576 status = "okay";
577};
578
579&pcie4_phy {
580 vdda-phy-supply = <&vreg_l6d>;
581 vdda-pll-supply = <&vreg_l4d>;
582
583 status = "okay";
584};
585
586&pmc8280c_lpg {
587 status = "okay";
588};
589
590&pmk8280_pon_pwrkey {
591 status = "okay";
592};
593
594&pmk8280_rtc {
595 nvmem-cells = <&rtc_offset>;
596 nvmem-cell-names = "offset";
597
598 status = "okay";
599};
600
601&pmk8280_sdam_6 {
602 status = "okay";
603
604 rtc_offset: rtc-offset@bc {
605 reg = <0xbc 0x4>;
606 };
607};
608
609&qup0 {
610 status = "okay";
611};
612
613&qup1 {
614 status = "okay";
615};
616
617&qup2 {
618 status = "okay";
619};
620
621&remoteproc_adsp {
622 firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
623
624 status = "okay";
625};
626
627&remoteproc_nsp0 {
628 firmware-name = "qcom/sc8280xp/qccdsp8280.mbn";
629
630 status = "okay";
631};
632
633&sdc2 {
634 pinctrl-0 = <&sdc2_default_state>;
635 pinctrl-1 = <&sdc2_sleep_state>;
636 pinctrl-names = "default", "sleep";
637
638 vmmc-supply = <&vreg_l9c>;
639 vqmmc-supply = <&vreg_l6c>;
640
641 cd-gpios = <&tlmm 131 GPIO_ACTIVE_LOW>;
642
643 status = "okay";
644};
645
646&uart17 {
647 compatible = "qcom,geni-debug-uart";
648
649 status = "okay";
650};
651
652&ufs_mem_hc {
653 reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
654
655 vcc-supply = <&vreg_l7c>;
656 vcc-max-microamp = <800000>;
657 vccq-supply = <&vreg_l3d>;
658 vccq-max-microamp = <900000>;
659
660 status = "okay";
661};
662
663&ufs_mem_phy {
664 vdda-phy-supply = <&vreg_l6b>;
665 vdda-pll-supply = <&vreg_l3b>;
666
667 status = "okay";
668};
669
670&usb_0 {
671 status = "okay";
672};
673
674&usb_0_dwc3 {
675 dr_mode = "host";
676};
677
678&usb_0_hsphy {
679 vdda-pll-supply = <&vreg_l9d>;
680 vdda18-supply = <&vreg_l1c>;
681 vdda33-supply = <&vreg_l7d>;
682
683 status = "okay";
684};
685
686&usb_0_qmpphy {
687 vdda-phy-supply = <&vreg_l9d>;
688 vdda-pll-supply = <&vreg_l4d>;
689
690 orientation-switch;
691
692 status = "okay";
693};
694
695&usb_0_qmpphy_dp_in {
696 remote-endpoint = <&mdss0_dp0_out>;
697};
698
699&usb_0_qmpphy_out {
700 remote-endpoint = <&pmic_glink_con0_ss>;
701};
702
703&usb_0_role_switch {
704 remote-endpoint = <&pmic_glink_con0_hs>;
705};
706
707&usb_1 {
708 status = "okay";
709};
710
711&usb_1_dwc3 {
712 dr_mode = "host";
713};
714
715&usb_1_hsphy {
716 vdda-pll-supply = <&vreg_l4b>;
717 vdda18-supply = <&vreg_l1c>;
718 vdda33-supply = <&vreg_l13c>;
719
720 status = "okay";
721};
722
723&usb_1_qmpphy {
724 vdda-phy-supply = <&vreg_l4b>;
725 vdda-pll-supply = <&vreg_l3b>;
726
727 orientation-switch;
728
729 status = "okay";
730};
731
732&usb_1_qmpphy_dp_in {
733 remote-endpoint = <&mdss0_dp1_out>;
734};
735
736&usb_1_qmpphy_out {
737 remote-endpoint = <&pmic_glink_con1_ss>;
738};
739
740&usb_1_role_switch {
741 remote-endpoint = <&pmic_glink_con1_hs>;
742};
743
744&xo_board_clk {
745 clock-frequency = <38400000>;
746};
747
748/* PINCTRL - additions to nodes defined in sc8280xp.dtsi */
749
750&pmc8280_1_gpios {
751 edp_bl_en: edp-bl-en-state {
752 pins = "gpio8";
753 function = "normal";
754 };
755
756 edp_bl_reg_en: edp-bl-reg-en-state {
757 pins = "gpio9";
758 function = "normal";
759 };
760
761 misc_3p3_reg_en: misc-3p3-reg-en-state {
762 pins = "gpio2";
763 function = "normal";
764 };
765};
766
767&pmc8280_2_gpios {
768 wwan_sw_en: wwan-sw-en-state {
769 pins = "gpio1";
770 function = "normal";
771 };
772};
773
774&pmc8280c_gpios {
775 edp_bl_pwm: edp-bl-pwm-state {
776 pins = "gpio8";
777 function = "func1";
778 };
779};
780
781&pmr735a_gpios {
782 hastings_reg_en: hastings-reg-en-state {
783 pins = "gpio1";
784 function = "normal";
785 };
786};
787
788&tlmm {
789 gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>;
790
791 edp_reg_en: edp-reg-en-state {
792 pins = "gpio25";
793 function = "gpio";
794 drive-strength = <16>;
795 bias-disable;
796 };
797
798 i2c4_default: i2c4-default-state {
799 pins = "gpio171", "gpio172";
800 function = "qup4";
801 drive-strength = <16>;
802 bias-disable;
803 };
804
805 i2c21_default: i2c21-default-state {
806 pins = "gpio81", "gpio82";
807 function = "qup21";
808 drive-strength = <16>;
809 bias-disable;
810 };
811
812 kybd_default: kybd-default-state {
813 disable-pins {
814 pins = "gpio102";
815 function = "gpio";
816 output-low;
817 };
818
819 int-n-pins {
820 pins = "gpio104";
821 function = "gpio";
822 bias-disable;
823 };
824
825 reset-pins {
826 pins = "gpio105";
827 function = "gpio";
828 bias-disable;
829 };
830 };
831
832 nvme_reg_en: nvme-reg-en-state {
833 pins = "gpio135";
834 function = "gpio";
835 drive-strength = <2>;
836 bias-disable;
837 };
838
839 pcie2a_default: pcie2a-default-state {
840 clkreq-n-pins {
841 pins = "gpio142";
842 function = "pcie2a_clkreq";
843 drive-strength = <2>;
844 bias-pull-up;
845 };
846
847 perst-n-pins {
848 pins = "gpio143";
849 function = "gpio";
850 drive-strength = <2>;
851 bias-pull-down;
852 };
853
854 wake-n-pins {
855 pins = "gpio145";
856 function = "gpio";
857 drive-strength = <2>;
858 bias-pull-up;
859 };
860 };
861
862 pcie3a_default: pcie3a-default-state {
863 clkreq-n-pins {
864 pins = "gpio150";
865 function = "pcie3a_clkreq";
866 drive-strength = <2>;
867 bias-pull-up;
868 };
869
870 perst-n-pins {
871 pins = "gpio151";
872 function = "gpio";
873 drive-strength = <2>;
874 bias-pull-down;
875 };
876
877 wake-n-pins {
878 pins = "gpio148";
879 function = "gpio";
880 drive-strength = <2>;
881 bias-pull-up;
882 };
883 };
884
885 pcie4_default: pcie4-default-state {
886 clkreq-n-pins {
887 pins = "gpio140";
888 function = "pcie4_clkreq";
889 drive-strength = <2>;
890 bias-pull-up;
891 };
892
893 perst-n-pins {
894 pins = "gpio141";
895 function = "gpio";
896 drive-strength = <2>;
897 bias-pull-down;
898 };
899
900 wake-n-pins {
901 pins = "gpio139";
902 function = "gpio";
903 drive-strength = <2>;
904 bias-pull-up;
905 };
906 };
907
908 sdc2_default_state: sdc2-default-state {
909 clk-pins {
910 pins = "sdc2_clk";
911 drive-strength = <16>;
912 bias-disable;
913 };
914
915 cmd-pins {
916 pins = "sdc2_cmd";
917 drive-strength = <16>;
918 bias-pull-up;
919 };
920
921 data-pins {
922 pins = "sdc2_data";
923 drive-strength = <16>;
924 bias-pull-up;
925 };
926
927 card-detect-pins {
928 pins = "gpio131";
929 function = "gpio";
930 drive-strength = <2>;
931 bias-disable;
932 };
933 };
934
935 sdc2_sleep_state: sdc2-sleep-state {
936 clk-pins {
937 pins = "sdc2_clk";
938 drive-strength = <2>;
939 bias-disable;
940 };
941
942 cmd-pins {
943 pins = "sdc2_cmd";
944 drive-strength = <2>;
945 bias-pull-up;
946 };
947
948 data-pins {
949 pins = "sdc2_data";
950 drive-strength = <2>;
951 bias-pull-up;
952 };
953
954 card-detect-pins {
955 pins = "gpio131";
956 function = "gpio";
957 drive-strength = <2>;
958 bias-disable;
959 };
960 };
961
962 tpad_default: tpad-default-state {
963 int-n-pins {
964 pins = "gpio182";
965 function = "gpio";
966 bias-disable;
967 };
968 };
969
970 ts0_default: ts0-default-state {
971 int-n-pins {
972 pins = "gpio175";
973 function = "gpio";
974 bias-disable;
975 };
976
977 reset-n-pins {
978 pins = "gpio99";
979 function = "gpio";
980 output-high;
981 drive-strength = <16>;
982 };
983 };
984
985 usb0_sbu_default: usb0-sbu-state {
986 oe-n-pins {
987 pins = "gpio101";
988 function = "gpio";
989 bias-disable;
990 drive-strength = <16>;
991 output-high;
992 };
993
994 sel-pins {
995 pins = "gpio164";
996 function = "gpio";
997 bias-disable;
998 drive-strength = <16>;
999 };
1000
1001 mode-pins {
1002 pins = "gpio167";
1003 function = "gpio";
1004 bias-disable;
1005 drive-strength = <16>;
1006 output-high;
1007 };
1008 };
1009
1010 usb1_sbu_default: usb1-sbu-state {
1011 oe-n-pins {
1012 pins = "gpio48";
1013 function = "gpio";
1014 bias-disable;
1015 drive-strength = <16>;
1016 output-high;
1017 };
1018
1019 sel-pins {
1020 pins = "gpio47";
1021 function = "gpio";
1022 bias-disable;
1023 drive-strength = <16>;
1024 };
1025
1026 mode-pins {
1027 pins = "gpio50";
1028 function = "gpio";
1029 bias-disable;
1030 drive-strength = <16>;
1031 output-high;
1032 };
1033 };
1034};