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Simon Glass6b1ba982014-12-29 19:32:28 -07001config VIDEO_VESA
2 bool "Enable VESA video driver support"
Simon Glass6b1ba982014-12-29 19:32:28 -07003 default n
4 help
5 Turn on this option to enable a very simple driver which uses vesa
6 to discover the video mode and then provides a frame buffer for use
7 by U-Boot. This can in principle be used with any platform that
8 supports PCI and video cards that support VESA BIOS Extension (VBE).
9
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020010config VIDEO_LCD_SSD2828
11 bool "SSD2828 bridge chip"
12 default n
13 ---help---
14 Support for the SSD2828 bridge chip, which can take pixel data coming
15 from a parallel LCD interface and translate it on the fly into MIPI DSI
16 interface for driving a MIPI compatible LCD panel. It uses SPI for
17 configuration.
18
19config VIDEO_LCD_SSD2828_TX_CLK
20 int "SSD2828 TX_CLK frequency (in MHz)"
21 depends on VIDEO_LCD_SSD2828
Siarhei Siamashkadddccd62015-01-19 05:23:35 +020022 default 0
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020023 ---help---
24 The frequency of the crystal, which is clocking SSD2828. It may be
25 anything in the 8MHz-30MHz range and the exact value should be
26 retrieved from the board schematics. Or in the case of Allwinner
27 hardware, it can be usually found as 'lcd_xtal_freq' variable in
Siarhei Siamashkadddccd62015-01-19 05:23:35 +020028 FEX files. It can be also set to 0 for selecting PCLK from the
29 parallel LCD interface instead of TX_CLK as the PLL clock source.
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020030
31config VIDEO_LCD_SSD2828_RESET
32 string "RESET pin of SSD2828"
33 depends on VIDEO_LCD_SSD2828
34 default ""
35 ---help---
36 The reset pin of SSD2828 chip. This takes a string in the format
37 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
38
Hans de Goedea5464f22015-01-20 09:22:26 +010039config VIDEO_LCD_HITACHI_TX18D42VM
40 bool "Hitachi tx18d42vm LVDS LCD panel support"
41 depends on VIDEO
42 default n
43 ---help---
44 Support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
45 lcd controller which needs to be initialized over SPI, once that is
46 done they work like a regular LVDS panel.
47
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020048config VIDEO_LCD_SPI_CS
49 string "SPI CS pin for LCD related config job"
Hans de Goedea5464f22015-01-20 09:22:26 +010050 depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020051 default ""
52 ---help---
53 This is one of the SPI communication pins, involved in setting up a
54 working LCD configuration. The exact role of SPI may differ for
55 different hardware setups. The option takes a string in the format
56 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
57
58config VIDEO_LCD_SPI_SCLK
59 string "SPI SCLK pin for LCD related config job"
Hans de Goedea5464f22015-01-20 09:22:26 +010060 depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020061 default ""
62 ---help---
63 This is one of the SPI communication pins, involved in setting up a
64 working LCD configuration. The exact role of SPI may differ for
65 different hardware setups. The option takes a string in the format
66 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
67
68config VIDEO_LCD_SPI_MOSI
69 string "SPI MOSI pin for LCD related config job"
Hans de Goedea5464f22015-01-20 09:22:26 +010070 depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020071 default ""
72 ---help---
73 This is one of the SPI communication pins, involved in setting up a
74 working LCD configuration. The exact role of SPI may differ for
75 different hardware setups. The option takes a string in the format
76 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
77
78config VIDEO_LCD_SPI_MISO
79 string "SPI MISO pin for LCD related config job (optional)"
80 depends on VIDEO_LCD_SSD2828
81 default ""
82 ---help---
83 This is one of the SPI communication pins, involved in setting up a
84 working LCD configuration. The exact role of SPI may differ for
85 different hardware setups. If wired up, this pin may provide additional
86 useful functionality. Such as bi-directional communication with the
87 hardware and LCD panel id retrieval (if the panel can report it). The
88 option takes a string in the format understood by 'name_to_gpio'
89 function, e.g. PH1 for pin 1 of port H.
Simon Glass51f2c992015-04-14 21:03:38 -060090
91config DISPLAY_PORT
92 bool "Enable DisplayPort support"
93 help
94 eDP (Embedded DisplayPort) is a standard widely used in laptops
95 to drive LCD panels. This framework provides support for enabling
96 these displays where supported by the video hardware.
Simon Glasse7e88232015-04-14 21:03:42 -060097
98config VIDEO_TEGRA124
99 bool "Enable video support on Tegra124"
100 help
101 Tegra124 supports many video output options including eDP and
102 HDMI. At present only eDP is supported by U-Boot. This option
103 enables this support which can be used on devices which
104 have an eDP display connected.