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Simon Glass6b1ba982014-12-29 19:32:28 -07001config VIDEO_VESA
2 bool "Enable VESA video driver support"
3 depends on X86
4 default n
5 help
6 Turn on this option to enable a very simple driver which uses vesa
7 to discover the video mode and then provides a frame buffer for use
8 by U-Boot. This can in principle be used with any platform that
9 supports PCI and video cards that support VESA BIOS Extension (VBE).
10
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020011config VIDEO_LCD_SSD2828
12 bool "SSD2828 bridge chip"
13 default n
14 ---help---
15 Support for the SSD2828 bridge chip, which can take pixel data coming
16 from a parallel LCD interface and translate it on the fly into MIPI DSI
17 interface for driving a MIPI compatible LCD panel. It uses SPI for
18 configuration.
19
20config VIDEO_LCD_SSD2828_TX_CLK
21 int "SSD2828 TX_CLK frequency (in MHz)"
22 depends on VIDEO_LCD_SSD2828
Siarhei Siamashkadddccd62015-01-19 05:23:35 +020023 default 0
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020024 ---help---
25 The frequency of the crystal, which is clocking SSD2828. It may be
26 anything in the 8MHz-30MHz range and the exact value should be
27 retrieved from the board schematics. Or in the case of Allwinner
28 hardware, it can be usually found as 'lcd_xtal_freq' variable in
Siarhei Siamashkadddccd62015-01-19 05:23:35 +020029 FEX files. It can be also set to 0 for selecting PCLK from the
30 parallel LCD interface instead of TX_CLK as the PLL clock source.
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020031
32config VIDEO_LCD_SSD2828_RESET
33 string "RESET pin of SSD2828"
34 depends on VIDEO_LCD_SSD2828
35 default ""
36 ---help---
37 The reset pin of SSD2828 chip. This takes a string in the format
38 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
39
Hans de Goedea5464f22015-01-20 09:22:26 +010040config VIDEO_LCD_HITACHI_TX18D42VM
41 bool "Hitachi tx18d42vm LVDS LCD panel support"
42 depends on VIDEO
43 default n
44 ---help---
45 Support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
46 lcd controller which needs to be initialized over SPI, once that is
47 done they work like a regular LVDS panel.
48
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020049config VIDEO_LCD_SPI_CS
50 string "SPI CS pin for LCD related config job"
Hans de Goedea5464f22015-01-20 09:22:26 +010051 depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020052 default ""
53 ---help---
54 This is one of the SPI communication pins, involved in setting up a
55 working LCD configuration. The exact role of SPI may differ for
56 different hardware setups. The option takes a string in the format
57 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
58
59config VIDEO_LCD_SPI_SCLK
60 string "SPI SCLK pin for LCD related config job"
Hans de Goedea5464f22015-01-20 09:22:26 +010061 depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020062 default ""
63 ---help---
64 This is one of the SPI communication pins, involved in setting up a
65 working LCD configuration. The exact role of SPI may differ for
66 different hardware setups. The option takes a string in the format
67 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
68
69config VIDEO_LCD_SPI_MOSI
70 string "SPI MOSI pin for LCD related config job"
Hans de Goedea5464f22015-01-20 09:22:26 +010071 depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
Siarhei Siamashkab8329ac2015-01-19 05:23:32 +020072 default ""
73 ---help---
74 This is one of the SPI communication pins, involved in setting up a
75 working LCD configuration. The exact role of SPI may differ for
76 different hardware setups. The option takes a string in the format
77 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
78
79config VIDEO_LCD_SPI_MISO
80 string "SPI MISO pin for LCD related config job (optional)"
81 depends on VIDEO_LCD_SSD2828
82 default ""
83 ---help---
84 This is one of the SPI communication pins, involved in setting up a
85 working LCD configuration. The exact role of SPI may differ for
86 different hardware setups. If wired up, this pin may provide additional
87 useful functionality. Such as bi-directional communication with the
88 hardware and LCD panel id retrieval (if the panel can report it). The
89 option takes a string in the format understood by 'name_to_gpio'
90 function, e.g. PH1 for pin 1 of port H.
Simon Glass51f2c992015-04-14 21:03:38 -060091
92config DISPLAY_PORT
93 bool "Enable DisplayPort support"
94 help
95 eDP (Embedded DisplayPort) is a standard widely used in laptops
96 to drive LCD panels. This framework provides support for enabling
97 these displays where supported by the video hardware.
Simon Glasse7e88232015-04-14 21:03:42 -060098
99config VIDEO_TEGRA124
100 bool "Enable video support on Tegra124"
101 help
102 Tegra124 supports many video output options including eDP and
103 HDMI. At present only eDP is supported by U-Boot. This option
104 enables this support which can be used on devices which
105 have an eDP display connected.