blob: 7965125c860e100605d614c8cf0c4864516d30c4 [file] [log] [blame]
Patrick Bruenn98d62e62016-11-04 11:57:02 +01001/*
2 * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG
3 * Patrick Bruenn <p.bruenn@beckhoff.com>
4 *
5 * Configuration settings for Beckhoff CX9020.
6 *
7 * Based on Freescale's Linux i.MX mx53loco.h file:
8 * Copyright (C) 2010-2011 Freescale Semiconductor.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16#include <asm/arch/imx-regs.h>
17
18#define CONFIG_CMDLINE_TAG
19#define CONFIG_SETUP_MEMORY_TAGS
20#define CONFIG_INITRD_TAG
21
22#define CONFIG_SYS_FSL_CLK
23
24/* Size of malloc() pool */
25#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
26
Patrick Bruenn98d62e62016-11-04 11:57:02 +010027#define CONFIG_REVISION_TAG
28
29#define CONFIG_MXC_UART_BASE UART2_BASE
30
31#define CONFIG_FPGA_COUNT 1
32
33/* MMC Configs */
34#define CONFIG_FSL_ESDHC
35#define CONFIG_SYS_FSL_ESDHC_ADDR 0
36#define CONFIG_SYS_FSL_ESDHC_NUM 2
37
Patrick Bruenn98d62e62016-11-04 11:57:02 +010038/* bootz: zImage/initrd.img support */
Patrick Bruenn98d62e62016-11-04 11:57:02 +010039
40/* Eth Configs */
41#define CONFIG_MII
42#define IMX_FEC_BASE FEC_BASE_ADDR
43#define CONFIG_ETHPRIME "FEC0"
44#define CONFIG_FEC_MXC_PHYADDR 0x1F
45
46/* USB Configs */
Patrick Bruenn98d62e62016-11-04 11:57:02 +010047#define CONFIG_USB_EHCI_MX5
Patrick Bruenn98d62e62016-11-04 11:57:02 +010048#define CONFIG_MXC_USB_PORT 1
49#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
50#define CONFIG_MXC_USB_FLAGS 0
51
52/* allow to overwrite serial and ethaddr */
53#define CONFIG_ENV_OVERWRITE
54#define CONFIG_CONS_INDEX 1
Patrick Bruenn98d62e62016-11-04 11:57:02 +010055
56/* Command definition */
Patrick Bruenn98d62e62016-11-04 11:57:02 +010057
58#define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */
Patrick Bruenn98d62e62016-11-04 11:57:02 +010059
60#define CONFIG_EXTRA_ENV_SETTINGS \
Patrick Bruennf8e63852017-07-11 11:23:20 +020061 "fdt_addr_r=0x71ff0000\0" \
Patrick Bruennbc104a72017-07-11 11:23:21 +020062 "pxefile_addr_r=0x73000000\0" \
Patrick Bruennf8e63852017-07-11 11:23:20 +020063 "ramdisk_addr_r=0x72000000\0" \
Patrick Bruenn98d62e62016-11-04 11:57:02 +010064 "console=ttymxc1,115200\0" \
65 "uenv=/boot/uEnv.txt\0" \
66 "optargs=\0" \
67 "cmdline=\0" \
68 "mmcdev=0\0" \
69 "mmcpart=1\0" \
70 "mmcrootfstype=ext4 rootwait fixrtc\0" \
71 "mmcargs=setenv bootargs console=${console} " \
72 "${optargs} " \
73 "root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \
74 "rootfstype=${mmcrootfstype} " \
75 "${cmdline}\0" \
76 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
Patrick Bruennbc104a72017-07-11 11:23:21 +020077 "loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \
Patrick Bruennf8e63852017-07-11 11:23:20 +020078 "loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \
Patrick Bruenn98d62e62016-11-04 11:57:02 +010079 "setenv rdsize ${filesize}\0" \
80 "loadfdt=echo loading ${fdt_path} ...;" \
Patrick Bruennf8e63852017-07-11 11:23:20 +020081 "load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \
Patrick Bruenn98d62e62016-11-04 11:57:02 +010082 "mmcboot=mmc dev ${mmcdev}; " \
83 "if mmc rescan; then " \
84 "echo SD/MMC found on device ${mmcdev};" \
85 "echo Checking for: ${uenv} ...;" \
86 "setenv bootpart ${mmcdev}:${mmcpart};" \
87 "if test -e mmc ${bootpart} ${uenv}; then " \
88 "load mmc ${bootpart} ${loadaddr} ${uenv};" \
89 "env import -t ${loadaddr} ${filesize};" \
90 "echo Loaded environment from ${uenv};" \
91 "if test -n ${dtb}; then " \
92 "setenv fdt_file ${dtb};" \
93 "echo Using: dtb=${fdt_file} ...;" \
94 "fi;" \
95 "echo Checking for uname_r in ${uenv}...;" \
96 "if test -n ${uname_r}; then " \
97 "echo Running uname_boot ...;" \
98 "run uname_boot;" \
99 "fi;" \
100 "fi;" \
101 "fi;\0" \
102 "uname_boot="\
103 "setenv bootdir /boot; " \
104 "setenv bootfile vmlinuz-${uname_r}; " \
105 "setenv ccatfile /boot/ccat.rbf; " \
106 "echo loading CCAT firmware from ${ccatfile}; " \
107 "load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \
108 "fpga load 0 ${loadaddr} ${filesize}; " \
109 "if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \
110 "echo loading ${bootdir}/${bootfile} ...; " \
111 "run loadimage;" \
112 "setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \
113 "if test -e mmc ${bootpart} ${fdt_path}; then " \
114 "run loadfdt;" \
115 "else " \
116 "echo; echo unable to find ${fdt_file} ...;" \
117 "echo booting legacy ...;"\
118 "run mmcargs;" \
119 "echo debug: [${bootargs}] ... ;" \
120 "echo debug: [bootz ${loadaddr}] ... ;" \
121 "bootz ${loadaddr}; " \
122 "fi;" \
123 "run mmcargs;" \
124 "echo debug: [${bootargs}] ... ;" \
Patrick Bruennf8e63852017-07-11 11:23:20 +0200125 "echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \
126 "bootz ${loadaddr} - ${fdt_addr_r}; " \
Patrick Bruennbc104a72017-07-11 11:23:21 +0200127 "else " \
128 "echo loading from dhcp ...; " \
129 "run loadpxe; " \
Patrick Bruenn98d62e62016-11-04 11:57:02 +0100130 "fi;\0"
131
132#define CONFIG_BOOTCOMMAND \
133 "run mmcboot;"
134
135#define CONFIG_ARP_TIMEOUT 200UL
136
137/* Miscellaneous configurable options */
Patrick Bruenn98d62e62016-11-04 11:57:02 +0100138#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
139
Patrick Bruenn98d62e62016-11-04 11:57:02 +0100140#define CONFIG_SYS_MEMTEST_START 0x70000000
141#define CONFIG_SYS_MEMTEST_END 0x70010000
142
143#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
144
Patrick Bruenn98d62e62016-11-04 11:57:02 +0100145/* Physical Memory Map */
146#define CONFIG_NR_DRAM_BANKS 2
147#define PHYS_SDRAM_1 CSD0_BASE_ADDR
148#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
149#define PHYS_SDRAM_2 CSD1_BASE_ADDR
150#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
151#define PHYS_SDRAM_SIZE (gd->ram_size)
152
153#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
154#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
155#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
156
157#define CONFIG_SYS_INIT_SP_OFFSET \
158 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
159#define CONFIG_SYS_INIT_SP_ADDR \
160 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
161
Masahiro Yamadae856bdc2017-02-11 22:43:54 +0900162/* environment organization */
Patrick Bruenn98d62e62016-11-04 11:57:02 +0100163#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
164#define CONFIG_ENV_SIZE (8 * 1024)
Patrick Bruenn98d62e62016-11-04 11:57:02 +0100165#define CONFIG_SYS_MMC_ENV_DEV 0
166
167/* Framebuffer and LCD */
168#define CONFIG_PREBOOT
169#define CONFIG_VIDEO_IPUV3
170#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
171#define CONFIG_VIDEO_BMP_RLE8
172#define CONFIG_SPLASH_SCREEN
173#define CONFIG_BMP_16BPP
174#define CONFIG_VIDEO_LOGO
Patrick Bruenn98d62e62016-11-04 11:57:02 +0100175
176#endif /* __CONFIG_H */