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wdenk2262cfe2002-11-18 00:14:45 +00001/*
2 * (C) Copyright 2002
Albert ARIBAUDfa82f872011-08-04 18:45:45 +02003 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
wdenk2262cfe2002-11-18 00:14:45 +00004 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk2262cfe2002-11-18 00:14:45 +00006 */
7
8#ifndef _PCI_I386_H_
Gabe Black452f50f2012-10-10 13:12:57 +00009#define _PCI_I386_H_
wdenk2262cfe2002-11-18 00:14:45 +000010
Simon Glassa219dae2015-03-05 12:25:31 -070011#include <pci.h>
12
Bin Meng3c8ae532015-02-02 22:35:25 +080013/* bus mapping constants (used for PCI core initialization) */
14#define PCI_REG_ADDR 0xcf8
15#define PCI_REG_DATA 0xcfc
16
17#define PCI_CFG_EN 0x80000000
18
19#ifndef __ASSEMBLY__
20
Graeme Russ83088af2011-11-08 02:33:15 +000021#define DEFINE_PCI_DEVICE_TABLE(_table) \
22 const struct pci_device_id _table[]
23
Simon Glassd188b182014-11-12 22:42:11 -070024struct pci_controller;
25
Graeme Russ1cfcf032011-11-08 02:33:22 +000026void pci_setup_type1(struct pci_controller *hose);
Simon Glassd188b182014-11-12 22:42:11 -070027
28/**
29 * board_pci_setup_hose() - Set up the PCI hose
30 *
31 * This is called by the common x86 PCI code to set up the PCI controller
32 * hose. It may be called when no memory/BSS is available so should just
33 * store things in 'hose' and not in BSS variables.
34 */
35void board_pci_setup_hose(struct pci_controller *hose);
Simon Glass7430f102014-11-12 22:42:12 -070036
37/**
38 * pci_early_init_hose() - Set up PCI host before relocation
39 *
40 * This allocates memory for, sets up and returns the PCI hose. It can be
Bin Meng8f9052f2014-12-30 22:53:21 +080041 * called before relocation. The hose will be stored in gd->hose for
Simon Glass7430f102014-11-12 22:42:12 -070042 * later use, but will become invalid one DRAM is available.
43 */
44int pci_early_init_hose(struct pci_controller **hosep);
Simon Glass6fb3b722014-11-12 22:42:14 -070045
Simon Glasse94ea6f2014-11-14 18:18:28 -070046int board_pci_pre_scan(struct pci_controller *hose);
47int board_pci_post_scan(struct pci_controller *hose);
48
Simon Glass6fb3b722014-11-12 22:42:14 -070049/*
50 * Simple PCI access routines - these work from either the early PCI hose
51 * or the 'real' one, created after U-Boot has memory available
52 */
Simon Glass31f57c22015-03-05 12:25:15 -070053unsigned int x86_pci_read_config8(pci_dev_t dev, unsigned where);
54unsigned int x86_pci_read_config16(pci_dev_t dev, unsigned where);
55unsigned int x86_pci_read_config32(pci_dev_t dev, unsigned where);
Simon Glass6fb3b722014-11-12 22:42:14 -070056
Simon Glass31f57c22015-03-05 12:25:15 -070057void x86_pci_write_config8(pci_dev_t dev, unsigned where, unsigned value);
58void x86_pci_write_config16(pci_dev_t dev, unsigned where, unsigned value);
59void x86_pci_write_config32(pci_dev_t dev, unsigned where, unsigned value);
Simon Glass6fb3b722014-11-12 22:42:14 -070060
Simon Glassa219dae2015-03-05 12:25:31 -070061int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset,
62 ulong *valuep, enum pci_size_t size);
63
64int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset,
65 ulong value, enum pci_size_t size);
66
Bin Menge3e7fa22015-04-24 18:10:03 +080067/**
68 * Assign IRQ number to a PCI device
69 *
70 * This function assigns IRQ for a PCI device. If the device does not exist
71 * or does not require interrupts then this function has no effect.
72 *
73 * @bus: PCI bus number
74 * @device: PCI device number
Bin Menge3e7fa22015-04-24 18:10:03 +080075 * @irq: An array of IRQ numbers that are assigned to INTA through
76 * INTD of this PCI device.
77 */
Bin Meng31a2dc62015-07-15 16:23:40 +080078void pci_assign_irqs(int bus, int device, u8 irq[4]);
Bin Menge3e7fa22015-04-24 18:10:03 +080079
Bin Meng3c8ae532015-02-02 22:35:25 +080080#endif /* __ASSEMBLY__ */
81
82#endif /* _PCI_I386_H_ */