| Wolfgang Denk | 6cb142f | 2006-03-12 02:12:27 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * U-boot - psd4256.h |
| 3 | * |
| 4 | * Copyright (c) 2005 blackfin.uclinux.org |
| 5 | * |
| 6 | * (C) Copyright 2000-2004 |
| 7 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 8 | * |
| 9 | * See file CREDITS for list of people who contributed to this |
| 10 | * project. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * Flash A/B Port A configuration registers. |
| 30 | * Addresses are offset values to CFG_FLASH1_BASE |
| 31 | * for Flash A and CFG_FLASH2_BASE for Flash B. |
| 32 | */ |
| 33 | |
| 34 | #define PSD_PORTA_DIN 0x070000 |
| 35 | #define PSD_PORTA_DOUT 0x070004 |
| 36 | #define PSD_PORTA_DIR 0x070006 |
| 37 | |
| 38 | /* |
| 39 | * Flash A/B Port B configuration registers |
| 40 | * Addresses are offset values to CFG_FLASH1_BASE |
| 41 | * for Flash A and CFG_FLASH2_BASE for Flash B. |
| 42 | */ |
| 43 | |
| 44 | #define PSD_PORTB_DIN 0x070001 |
| 45 | #define PSD_PORTB_DOUT 0x070005 |
| 46 | #define PSD_PORTB_DIR 0x070007 |
| 47 | |
| 48 | /* |
| 49 | * Flash A Port A Bit definitions |
| 50 | */ |
| 51 | |
| 52 | #define PSDA_PPICLK1 0x20 /* PPI Clock select bit 1 */ |
| 53 | #define PSDA_PPICLK0 0x10 /* PPI Clock select bit 0 */ |
| 54 | #define PSDA_VDEC_RST 0x08 /* Video decoder reset, 0 = RESET */ |
| 55 | #define PSDA_VENC_RST 0x04 /* Video encoder reset, 0 = RESET */ |
| 56 | #define PSDA_CODEC_RST 0x01 /* Codec reset, 0 = RESET */ |
| 57 | |
| 58 | /* |
| 59 | * Flash A Port B Bit definitions |
| 60 | */ |
| 61 | |
| 62 | #define PSDA_LED9 0x20 /* LED 9, 1 = LED ON */ |
| 63 | #define PSDA_LED8 0x10 /* LED 8, 1 = LED ON */ |
| 64 | #define PSDA_LED7 0x08 /* LED 7, 1 = LED ON */ |
| 65 | #define PSDA_LED6 0x04 /* LED 6, 1 = LED ON */ |
| 66 | #define PSDA_LED5 0x02 /* LED 5, 1 = LED ON */ |
| 67 | #define PSDA_LED4 0x01 /* LED 4, 1 = LED ON */ |
| 68 | |