blob: 913c9326203822d0c885e65a957abee7973202f7 [file] [log] [blame]
Marek Vasutdedb60f2018-01-08 16:38:51 +01001/*
2 * R-Car Gen2 Clock Pulse Generator
3 *
4 * Copyright (C) 2016 Cogent Embedded Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation; version 2 of the License.
9 */
10
11#ifndef __CLK_RENESAS_RCAR_GEN2_CPG_H__
12#define __CLK_RENESAS_RCAR_GEN2_CPG_H__
13
14enum rcar_gen2_clk_types {
15 CLK_TYPE_GEN2_MAIN = CLK_TYPE_CUSTOM,
16 CLK_TYPE_GEN2_PLL0,
17 CLK_TYPE_GEN2_PLL1,
18 CLK_TYPE_GEN2_PLL3,
19 CLK_TYPE_GEN2_Z,
20 CLK_TYPE_GEN2_LB,
21 CLK_TYPE_GEN2_ADSP,
22 CLK_TYPE_GEN2_SDH,
23 CLK_TYPE_GEN2_SD0,
24 CLK_TYPE_GEN2_SD1,
25 CLK_TYPE_GEN2_QSPI,
26 CLK_TYPE_GEN2_RCAN,
27};
28
29struct rcar_gen2_cpg_pll_config {
30 unsigned int extal_div;
31 unsigned int pll1_mult;
32 unsigned int pll3_mult;
33 unsigned int pll0_mult; /* leave as zero if PLL0CR exists */
34};
35
36struct gen2_clk_priv {
37 void __iomem *base;
38 struct cpg_mssr_info *info;
39 struct clk clk_extal;
40 struct clk clk_extal_usb;
41 const struct rcar_gen2_cpg_pll_config *cpg_pll_config;
42};
43
44int gen2_clk_probe(struct udevice *dev);
45int gen2_clk_remove(struct udevice *dev);
46
47extern const struct clk_ops gen2_clk_ops;
48
49#endif